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32K RAM 




• STATIC MEMORY 



• 9 REGULATORS FOR 
EXCELLENT HEAT 
DISTRIBUTION 



• EXTENDED ADDRESSING 



• PHANTOM LINE 



• LOW POWER 





TARBELL ELECTRONICS 






950 DOVLEN PLACE, SUITE B 






CARSON, CALIFORNIA 90746 






(213) 538-4251, 538-2254 








- ■ ^ 



Tar bell 32K RAM Memory 




★ S-100BUS ★ 300ns ★ STATIC MEMORY ★ 
★ 9 REGULATORS PROVIDE EXCELLENT HEAT DISTRIBUTION ★ 
★ EXTENDED ADDRESSING (Bank Switching) * 
★ LOW POWER REQUIREMENT ★ 
★ PHANTOM LINE* 
★ 20 PAGE OPERATING MANUAL ★ 
★ FULL 1-YEAR WARRANTY ★ 

FULLY ASSEMBLED AND TESTED 

16K ALSO AVAILABLE, FULLY ASSEMBLED 



Wo 



Please send check or money order. No CODs or credit will be accepted on this item. Califor- 
nia residents please add 6% sales tax. 



950 DOVLEN PLACE -SUITE B • CARSON, CALIF. 90746 
(213) 538-4251 • (213) 538-2254 





CONTENTS 

Operation 1 

Assembly Instructions 4 

Parts List 8 

Troubleshooting 9 

Schematic Diagram 11 

Appendix A (Memory Test Program) A1 

V ) 



^COPYRIGHT 

All rights reserved. No part of this manual 
schematic diagram, circuit board or descrip- 
tions contained herein may be copied or 
otherwise conveyed without express permis- 
sion of Tarbell Electronics. 



OPERATION 



Introduction: 

The overall scheme of the 32K Static Memory Board is shown on page 1 0. Notice data 
bit 0 is contained by the lowest chips on the board in 8-4K banks. Data bit 07 is at the 
top. If you were to use this 32K board as a 4K board, you could install only 8 chips in 
any vertical column. The TMS 4044 (MM 5257) is a 4K by 1 memory device. One chip 
therefore at any location will store one bit, 4K deep. 

The right hand vertical column is the one called "CS0" or CHIP SELECT - 0. 

In the center top of the board you will notice some white letters saying "CS-76543210". 

The holes directly above these numbers are connected to the CHIP SELECT lines on all 
the chips in the columns so marked. The columns are marked sort of backwards. CS0 
on the right has a number '9' under it. CS07 on the left has a '1 ' under it. 'H' row is 
bit 0 and 'A' row is bit 07. Directly below "CS76543210" you will notice a 16 pin DIP 
socket. The Pattern of holes and numbers are as follows: 



32 o o o o o o o o 0 

64 O O O O O O O 0 32 



We have decoded all 16-4K blocks. The first 4K block is of course 0. The first block 
over 32K would be the '32' on the lower right. The last (16th) 4K block would be on 
the lower left. 

Examples: 

8K, Lowest 2 blocks 



cs 7 6 5 

o o o 

32 O O O 



4 3 2 

o o o 



64 O 



O 32 



16K, Lowest 4 blocks (32K Lowest 8 blocks - Add Dotted) 



CS 7 


6 


5 


4 


3 


2 


1 0 


1 


Qs 

1 
1 


<v 

i 
i 


°> 

i 


a 




] : 


32 or' 


1 

d 


i 

4 


i 

i 

6 


or 


6 





64 O O O O O O O O 32 



-/- 



16K, Lowest 4 blocks but chips in every other column 



cs 7 
o 

32 O 




64 O 



O 32 



16K, From 32K to 48K (Chips in right side of board) 



cs 7 6 5 

o o o 



4 3 2 1 
O 0^ 01 O, Q, 



32 O O O O O 
64 O O O O & 



o 

4 



32 



The placement of the chips on the board and corresponding decoded bank assignment 
are completely flexible. You could cross all the wires up and have any 4K section any- 
where you wish. Try to think of the 32K board as 8 conventional 4K boards, all in 
vertical columns starting from right to left. Since there are 16-4K banks available for 
use in a S-100 computer, you must decide where your 8 will go. 



More Examples: 



c 
E 

O 

o 



CS 7 
O 



CM 

c 
E 

_3 
O 

o 
6 
O 



c 
E 

_3 
O 

o 
5 
O 



c 
E 

3 
O 

o 
4 
O 



co 
c 
E 

3 

3 

3 
O 



c 
E 

_3 

O 

o 
2 
O 



oo 
c 
E 

_3 

<s 

1 

o 



CD 
C 

E 

_3 
O 

o 



a 

3 

















CM 


00 


Mi 


o 


CO 


CM 


00 


CO 


CM 

I 


i 


CM 

I 


I 


T— 

I 


I 


I 














00 


s 


o 


CO 


CM 


00 




CM 




CM 










32 O 


O 


o 


O 


0 


O 


O 



64 O 


O 


O 


O 


O 


O 


O 


O 32 


-64K 


-60K 


-56K 


-52K 


-48K 


-44K 


-40K 


-36K 


60K - 


56K- 


52K - 


48K- 


44K- 


40K - 


36K - 


32K - 



2- 



If you are interested in a straight forward static memory board without memory 
management or more than 64K in your system at one time, do not read further or 
install any additional jumpers. Go on to ASSEMBLY INSTRUCTIONS. 



PHANTOM LINE: If jumper marker 'PHANTOM' is installed, whenever S-100 BUSS 
pin 67 is pulled low, the entire board will be disabled. 

MEMORY MANAGEMENT: Two additional address lines are decoded. These are 
S-100 pins 65 (A-17) and 66 (A-16). 

NOTE: IF YOU DO NOT HAVE MEMORY MANAGEMENT SKIP THIS SECTION! 

If memory management is not desired DO NOT connect anything to A-16, A-17, 1 2 3 4, 
or A,B. Otherwise use below to decode 64K, 128K or 256K Board Select. 



A16[66> O O 1 04 





LOGIC STATE 
A16 A17 



CONNECT JUMPERS 



THIS BOARD IN: 



A to 1, B to 3 



OK 



63K Block 



A to 1, B to 4 



64 K 



127K Block 



A to 2, B to 3 



128K 



191 K Block 



1 



1 



A to 2, B to 4 



192K 



256K Block 



3 



ASSEMBLY INSTRUCTIONS 



1 . ( ) Open bag of .1 mfd capacitors and straighten leads. 

2. ( ) Refer to drawing No. 1. Install all .1 capacitors at locations shown. 



3. ( ) Turn board and solder all leads. 



4. ( ) Locate capacitors C2 in kit. BE CAREFUL TO OBSERVE POLARITY! 

Install each capacitor at locations shown on drawing No. 2 before 
soldering, go back and check against drawing for incorrectly polarized 
capacitors. Most boards returned for repair have contained errors in polarity. 
What happens is that a backward capacitor blows the regulator, which then 
zapps a whole column of memory chips! (boooo!!) 

5. ( ) Install 5 resistors, 1 K value at places shown on drawing No. 1. Solder at 

this time. 



6. ( ) Locate all 64 18 pin sockets. Put them into the board one column at a time. 

Hold them in place with a piece of cardboard and flip board to back side. 
Solder or bend 2 corner pins of each chip (i.e. pins 8 & 16). Then go on to 
next column. To complete soldering go down a row after placing board on 
table long side up. This seems to be the fastest. After soldering entire board, 
inspect under strong light for solder splashes or webs. 

7. ( ) Locate special 16 pin socket that has molded circular receptacles. Install this 

socket at the decoded address position. 



32 



64 



o o o 



o o 



32 



8. ( ) Refer to drawing No. 2. Install remaining 14 and 16 pin sockets. First 

put a small piece of black tape over feed through holes at top center of 
board. 



9. ( ) Then mount heat sink in place using only outer 2 regulator screw holes. 
Make sure that the heat sink is positioned perfectly over all capacitors and 
other screw holes. Spend some time here and do this right. It's not impossible 
to misalign the sink and short the +5 on a capacitor lead. After setting 
everything up straight, carefully mount center 7 regulators in place as per 
board photo. Don't forget to apply a small dab of white heat sink compound 
to the underside of each regulator before bolting it down. After inside 
regulators are done, remove outside screws and do those two too. (?) 



-4- 



10. ( ) Time now to start buzzing out the shorts. The most important ones are the 

+8 to +5 possibilities. Pin 1 of S-100 connector at lower left is +8. Make sure 
as you go from left to right across board that no pin 18 on any column has a 
low resistance path to +8. A buzz box can be used if a meter is not available. 
Address lines can be checked if necessary as well as data. We suggest re- 
moving all boards from your computer before plugging in the memory 
board. Check output from +5 regulators (the lower pin) on all regulators. 

11. ( ) Install all 16 and 14 pin chips.'lnstall row of round chip select pins at 'CS' 

as per drawing No. ( 1 ). The right most pin is a pull up resistor that may 
be tied to any unconnected bank of chips to insure that they do not inter- 
mittently 'select' themselves on noise. 

NOTE: ON ALL 16K BOARDS, ALTERNATE UNUSED CS'S MUST BE 
PULLED UP! 

12. ( ) Install a single column of 8 memory chips. Use the correct 'CS' for the 

column you have filled. They correspond to the physical location on the 
board of the columns except that the right most 'CS' pin is a pullup and is 
marked 'BD'. For example if you had filled the right most column with 
chips, CS line 0 would access that column. If you would like to place that 
4K bank at 48K+ for the purpose of test, make a jumper from CS 0 to the 
fourth pin on the bank decode IC socket. 



cs 7 
o 

32 O 



6 5 
O O 



4 
O 



3 
O 



2 
O 



1 

O 



3 



O 0 



b 
d 

O (pullup) 



64 O 



O 32 



13. ( ) Continue filling columns and testing with whatever memory test you have. 

We recommend that if you are planning only 16K of memory chips for 
a while, to use every other column to maximize cooling. A fully stuffed 32K 
board MUST have some forced cooling (at least 10 cfm) passing over the 
chip side of the board. Constantly check the board heat during the first 
15 minutes of operation. An undercooled board will show data errors within 
the first hour of operation. These are caused by memory slowing down as it 
heats up. Usually no permanent damage results. Very hot boards do seem to 
crash chips more than cool ones though. Any reasonable cooling will allow 
2 fully stuffed 32K boards to be run slot to slot. 16K (half stuffed) can be 
run with convection cooling. A fan never hurts though! 

* 

Refer to finished board photo for IC location. 



-5- 



£3 



0 



0 



# « 




til- 



Pi 



0 



0 0 

ft # ft © SO ft/ft W . ft- ft © ft © -ft ft © ft ft # ft f © If ft ft ft ft ft ft ft ft If 



0 9 

ft ft ft ft ft ft ft # ft ft « ft f © W ft ft ft ft ft ft ft ft W ft : 

0 0 

0 0 

ft ft ft ft ft ft ft ft ft- ft m ft ft © m f ft ft ft «- ft ft & i IF ft s 



1111 



; © ft ft ft « © ft ft If ft- ft ft ft ft ft f ft ft ft- ft ft ft : m- ft : f ft 'ft 


ft ft ft ft ft « f © * ; ; ft /l.£J15l£...l.J£# • ft ft ft ft ft ft ft If ft ft ft ft ft « ft © ft © « ft » # ft ft if f ft ft ft © ft ft ft ft If 








0 


1 


0 




0 






0 


1 : . : 1 















0 



3 




3 



■■■■■■■I 



y 



0 



"♦Vf» ft » #ji ft- ' » ft]© '« ft] 




Drawing No. 1 




■■■■■Mi 

IP^iP^^ifet 



■111L 

illll 



i *'!" ' ?, r^r-^ I""" ? ! c — — — 
pp# r r r " 



tliiiii 



1 



1 1 1 1 1 ! 1 1 1 1 1 

1 ■ 
i ■ 1 1 



illTit ill II iW 

Ml 1 I 1 ■ I 1 I I! 1 I ■ ■ 1 1 I 1 I I I ■ ■ I ■ 1 ■ 1 I I I I 1 I I 1 1 11 I I I 

illuM I MMMMMMIM mMIMIMMMM 




Drawing No. 2 




» » « « » a * * » »*.*».» « * •> « « *« ? * » » <« o » « * J » 



, , ; , 




H^ifHti 




S-100 32K Ram 



PART NO. 


DESCRIPTION 


QTY 


32KS100 


CIRCUIT BOARD 


1 


MM5277/TMS4044 


MEMORY CHIP 


64 


7805 


REGULATOR 


9 


16AUGAT 


GOLD 16 PIN SOCKET 


1 


9S0CP 


JUMPER SOCKET 


9 


1KRES 


1K RESISTOR 1/4W 


5 


440SCR 


REGULATOR SCREW 


9 


440NUT 


REGULATOR NUT 


9 


HS9 


HEAT SINK 


1 


18PS0C 


18 PIN SOCKET 


64 


16PS0C 


16 PIN SOCKET 


4 


14PS0C 


14 PIN SOCKET 


7 


475MT 


4.7 -6.8 MFD TANT. 


12 


.1 BYCAP 


.1 DIPPED CERAMIC 


41 


74LS04OR 74LS14 


74LS04 OR 74LS14 


5 


74368 


74368 


2 


7413 


7413 


1 


7430 


7430 


1 


74138 


74138 


2 



-8- 



TROUBLESHOOTING 



1. Most troubles occurring immediately after construction are shorts. Close visual 
inspection is much faster than logical circuit tracing for this type of problem. 

Open circuits caused by over etching of the p.c. board or bad soldering are by far 
the most difficult problems to locate. Memory tests run on boards with open 
address lines give strange results that often do not point to the real problem. 
A general rule of thumb is that if the problem is random and somewhat unpredicta- 
ble, an open is probably at fault. If the problem is very predictable and regular, 
a short or bad chip is at fault. 

A 'Buzz Box' is an absolutely indispensable tool in checking memory boards. 
You do not have to look up from your work each time to verify continuity. 
The many circuit traces on a memory board are a problem by themselves without 
having to lose your place each time you have to look up to a meter face. 

2. If the memory board has been in service for some time and a problem with it is 
suspected, a memory test should be run. The Rasmussen test for diseased memory 
is a factory test designed to display the most common problems first and the most 
uncommon ones last. The test never finishes by itself. The operator may terminate 
it by pressing the space bar at any time. 

Generally memory chip failures will be found within five seconds. The test takes 
about three minutes to run all phases in a 32K board. The test falls into a random 
numbers test at the end of the first phase and will stay there until a space bar is 
entered. 

When initializing the test for a 32K board addressed at 0000, the correct answers to 
the address prompt entry would be 0000 and 7FFF. The test will do the following: 

STUCK BIT: Fills test area with FF's and checks for FF's 

Fills test area with 00's and checks for 00's 

BIT SHORTED: Rotates a bit from LSB to MSB filling tested memory 

each time, checking one bit at a time 

ADDRESS SHORTED: Fills all memory with 55 Hex then writes an AA Hex 

at 0000 (or the lowest address tested). It then tests 
the rest of memory for 55's. Then it clears location 
of the AA and writes it into 0001. Then 0002, 0004, 
0008, etc. setting a new address bit high each time 
and testing all of memory. If any address bit is shorted 
to another, the test will find an AA in another location 
than the place it wrote one. This test takes the most 
time and is run last. 



-9- 



RANDOM NUMBERS: A random number routine generates an eight bit number 

pattern and writes it through all test memory. It then 
re-inserts the same seed to the routine and test reads 
the memory. A new seed is generated and the exercise 
is repeated with a new pattern. This goes on and on 
reporting each loop through until aborted with the 
space bar. 

The layout drawing below will help in relating a bad bit pattern to the correct 
chip. 

To completely test for all address open and short combinations, the test should be 
run over a 4K boundry, 8 times (for 32K, of course). For example the first time, 
enter 0000 and 0FFF as the starting and ending address. When test is complete, 
re-run it entering 1000 and 1 FFF. Then 2000 and 2FFF and so on. Then run the 
test from 0000 to 7FFF. There are some subtle things that get missed if you only 
run the last test (0000 to 7FFF) and not4K at a time. 

If your board passes these tests and will run for an hour on the random numbers 
test without a problem, look somewhere else for your troubles! 



D7 
D6 

D5 
D4 
D3 
D2 
D1 
DO 

CS7 086 085 084 



FIRST £ 

4K 5 

D7 

D6 

D5 
D4 

D3 
D2 

D1 
DO 

0S3 0S2 0S1 0SO 



Memory Chip Layout 



-10- 




PDB<N 



*>0UT [7? > ^4>rJ 



> TO M-L 4044 ( | ^ TV4 V 



APPENDIX A 

THE RASSMUSSEN TEST FOR DISEASED MEMORY 



MEMORY TEST PROGRAM 
DELTA PRODUCTS 
BY D. RASMUSSEN 
LAST EDIT 1-10-79 



0500 = 
F5FF = 



0100 
OOF 9 
OOOE 
00F8 
OOFE 
OOFC 
OOFA 
00F7 
00F5 
OOF 3 
0000 



MEMORY TEST WILL USE DEFAULT ADDRESS IF STARTING AND 
ENDING ADDRESS QUESTIONS ARE ANSWERED WITH "CR" 
MEMORY TEST CAN BE TERMINATED BY "SP" 
ENTERING MEMORY TEST WITH R IN TBUF WILL CAUSE 
ALL BUT RANDOM NUMBERS TEST TO BE SKIPPED 

** ********************************************************** 



DEFST EQU 
DEFEND EQU 



500H ; DEFAULT STARTING ADDRESS (INCLUSIVE) 
0F5FFH ; DEFAULT ENDING ADDRESS (INCLUSIVE) 



ft*********************************************************** 



STACK EQU 
COUNT EQU 
RETRYS EQU 
TESTWORD EQU 
ENDADD EQU 
MEM EQU 
TESTLOC EQU 
TBUF EQU 
SEED EQU 
SEEDST EQU 
MONITOR EQU 



0100H 
STACK-7 
14 

STACK-8 
STACK-2 
STACK-4 
STACK-6 

STACK-9 ;0R 82H FOR CPM'S TBUFF 
STACK- 11 
STACK- 1 3 

0 ; MONITOR OR WARM BOOT ENTRY POINT 



STACK 

STORAGE FOR RETRY COUNT 

# OF RETRYS 

STORAGE 

ENDING ADDRESS 
STARTING ADDRESS 



0100 



ORG 0100H 
START : 



0100 C3A90M 
0103 C30900 
0106 C30600 

0109 D5 
01 OA CDOCOO 
010D D1 
01 OE C9 



JCONI: 
JCONS : 
CONO: 

JCONO: 



JMP START 1 
JMP CONIN 
JMP CONST 

PUSH D 
CALL CONOT 
POP D 
RET 



START2: 



01 OF 
01 1 1 
0114 
0117 
01 1A 
01 ID 



3E0E 

32F900 

119403 

CDE601 

110104 

CDE601 



MVI A, RETRYS 
STA COUNT 
LXI D.SIG 
CALL PMSG 
LXI D,SMSG 
CALL PMSG 



;SET RETRY COUNT 

;SIGN ON 
; PRINT IT 

; STARTING ADDR. MSG. 
;PRINT IT 



■A1- 



ni2n pnnnn'a 

U I C.U KsUUKJKJj 




pat t p,ftadd 

UHLL KjCiiAUU 


•ni?T ^TAPTTMn AHTlP PROM PHMTM 


U Icj UcLc.Cj\J 1 




TMP T D^T1 


•t?T Afl - 0 THFM RMTPY WA9 PP 
jTLnU — U IliEjlN ClNlfll WHO OR 


0126 ^innnc: 




T YT H DPF^T 
LAX n,L>E,rOl 


, UEil JJILrULl O I All i JLJNu AUUIX . 


H1PQ fc; 




r uon n 




U 1 C.A \sUVR\J \ 




PAT 1 PHT 

LHLL rilL 




019n F1 

U I C.V Hi I 




PHP H 
rur n 






t d^t 1 • 

LJJO 1 1 • 






ni9F 22pphp 




^IHT T) MFM 


•^AVR ^TARTTMP. ADTiRP^^ 

y OH V SL O lnl\ 1 JL1NVJ HJ^i^nEiOO 


0101 1 1 oonii 




T YT H FMQP. 
LAI U , XLJYIOU 


• TPMnTMP- AHHR MC»P. 


ni Qli php An 1 




pAT T PMQf! 








p a t t ppt a nri 


• PTTT CMHTMP. AnHPTTClQ TJRPM VTrVPHAPn 
, uEii EiJNl/liMu AJJunHoo rnUn 1\. JtL I dUARV 






TMP T HCITO 


iDT Ap. «. n THT?M WAQ PR 
y r LHu s U ltlEjJM Who Ln 


u l 3D c. I r r r o 




t yt u "nTTirirKTri 
LAI n , u Ei r r.WJJ 


,L>EirHULl EjEW AUUtx nlun DUE* 


niiin PC 




PTTQU H 

ruon n 




niln rnnani 




CALL PHL 


• PRTMT nFTTATTT T flnnRIT^^ 
,rnxJNl L»E<rHULl HUUXlEiOO 


n 1 lili p 1 




POP H 






LDST2: 






U 1 HO eLdrCiVU 




SHLD ENDADD 


• qavc T?Krr»TMP. Annpir^^i 

jOAVht EtiiulViKJ AUJJniLoo 




RESTART: 




U 1 *tO jiir |UU 




LDA TBUF 


•PITT TPTTTT TO ^T?P TF RAMTiOM TP^T HMT Y 
jLrEil XDUr 1VJ OE<E< ±T nHlML'Uri lEiOl VJ1NL1 


nilip ffrp 

U 1 *tD r LiO<- 




CPI f R f 


• TP R THPM P,n TiTRPPTT Y TO RAMnDM TPC»T 


c\^hT\ PAlinnQ 

U 1 HU LHHUUj 




JZ RNDW 


• pn nn ramhom mttmrpr^ 

jUrU UKJ nAJNUUH JNUrlDEinO 


U I DU l I DLU*t 




LXI D , TEST 1 








CALL PMSG 


•PRTMT TP^IT 


nicA oAff 




MVI B ,0FFH 


• PP TP*«sT ^START 


u I do \jur i u i 




CALL TESTW 


• MRTTP TPC«T PYTP 
)WniXL lEiOi DILEj 






CALL TESTR 


•PHPPV TP^T PYTP 
) UnE(LJ\ 1 EiO 1 DIIEj 


U 1 DJCi uouu 




MVI B,0 


• 7PPPCi TP9T 


ni An phf 1 n 1 




CALL TESTW 


• WRTTP TPCJT PVTP H 
, Wn±lJtL lEiOi DliEi U 






CALL TESTR 


• T17QT 


U I DO I I OUuH 




LXI D, TEST 3 




niAo pnp6ni 

U I U-UEiOU I 




CALL PMSG 


• PRTMT PTT 9HHRT TP^T 


01 6C 3E01 




MVI A,1 


; ROTATE BIT TEST 




L00P2 : 






01 6E M7 




MOV B, A ;MAKE 


TEST BYTE 


01 6F CD6602 




CALL R0TTST 


;D0 TEST 


U I f c. Uc.VCj\J I 




JNC L00P2 


•nHMP WTTH ft PTT99 




; ADDRESS LINE TEST 




ni 7c: 1 1 ftnnli 

U 1 ( D II OUU*t 




LXI D,TEST4 




oi7A pnpAn 1 




CALL PMSG 


•PRTMT AHDR T TMP TP9T 


U I f D UODD 




MVI B,55H 


• TP<?T PYTP 






CALL ADTEST 


• TPQT 
, lEiOi 


UlOU UDAA 




MVI B,0AAH 


.rprpoT PYTF 
j X EiO 1 Dl l£i 


U 1 0<i f C.\JC. 




CALL ADTEST 


y 1 EiO 1 


U 1 OD jEjOc. 




MVI A, f R f 




u i o f $c.r ( u u 




STA TBUF 


•PTIT R TM TRTTF _ T OOP DM RANDOM TF^T 
^rui n xin lour Luur vjin naviUKjn ijuoi 


U I OH L» JHUUj 




JMP RNDW 


•DO RAMDOM Jt TF^T 

y U\J X\HlNl/VJrJ 7r IEjOI 




DONER: 






018D 11F103 




LXI DjMSGOK 


; POINT AT TEST C0MPLEAT MESSAGE 




D0NEA : 






0190 CDE601 




CALL PMSG 




0193 C34801 




JMP RESTART 


; START TEST AGAIN WITH OLD PRAMETERS 



-A2- 



ERROR: 



0196 
0197 
0198 
0199 
019A 
01 9D 
01A0 
01A1 
01A4 
01A6 
01A9 
01AC 
01AD 
01B0 
01 B1 
01B4 
01B5 
01B6 
01B7 
01 BA 
01BB 
01BE 
01C1 
01C2 
01C5 
01C8 
01 CB 
01CE 
01D1 
DTD 3 



C5 
D5 
E5 
F5 

11A403 
CDE60 1 
13 

3AF900 
FEOE 
CCE60 1 
CDDA01 
50 

CD4702 
78 

CD0C03 
F1 
F5 
57 

CD4702 
F1 

CD0C03 
3AF900 
3D 

32F900 

C2D601 

11CB03 

CUE601 

CD0003 

3E0E 

32F900 



01D6 E1 
01D7 D1 
01D8 C1 
01D9 C9 



01 DA 54 
01DB CD4702 
01DE 55 
01DF CD4702 
01 E2 CD2E03 
01E5 C9 



01E6 1A 
01E7 B7 
01E8 C8 
01E9 4F 
01EA CD0901 
01ED 13 
01 EE C3E601 



PUSH B 
PUSH D 
PUSH H 
PUSH PSW 
LXI D.MSG1 
CALL PMSG 
INX D 
LDA COUNT 
CPI RETRYS 
CZ PMSG 
CALL PHL 
MOV D,B 
CALL CNVT 
MOV A,B 
CALL CNVTB 
POP PSW 
PUSH PSW 
MOV D,A 
CALL CNVT 
POP PSW 
CALL CNVTB 
LDA COUNT 
DCR A 
STA COUNT 
JNZ MORET 
LXI D,MSG4 
CALL PMSG 
CALL GETADD 
MVI A, RETRYS 
STA COUNT 

POP H 
POP D 
POP B 
RET 



PRINT H,L REGISTER 



MORET: 



PHL: 



;SAVE ALL REGS. 



; PR INT LABLES 
; PRINT HL REG 
;GET SHOULD BE DATA 
; PRINT HEX 



;GET WAS DATA 
; PRINT HEX 



;GET ERROR COUNT 

;ONE LESS 

;PUT BACK COUNT 



;SEE IF STOP OR CONTINUE 
; RESET COUNT 

;GET ALL REGS. BACK AND CONTINUE TEST 



MOV D,H 
CALL CNVT 
MOV D,L 
CALL CNVT 
CALL TAB 
RET 



PRINT STRING POINTED TO BY D,E 



;MAKE ADDRESS OF ERROR ASCII 



PMSG: 



LDAX D 
ORA A 
RZ 

MOV C,A 
CALL CONO 
INX D 
JMP PMSG 



;GET BYTE TO BE PRINTED 
;END OF TEXT? 

; CONVENTION 
;GOTO OUTPUT 



-A3- 



FILL TEST MEMORY WITH TEST WORD 



01F1 CD0002 

01F4 CD3902 
01F7 D8 
01F8 70 
01F9 CD4002 
01FC D8 
01FD C3F401 

0200 2AFE00 

0203 EB 

0204 2AFC00 
0207 C9 



0208 2AFC00 
02 OB 22FA00 

020E CD2102 



0211 
0214 
0215 
0216 
0217 
021 A 
021D 
021E 



CD3902 
D8 
7E 
B8 

C49601 
CD4002 
D8 

C31 102 



0221 E5 

0222 C5 

0223 CD0601 

0226 B7 

0227 CA3202 
022A CD0301 
022D FE20 
022F CA8E03 

0232 C1 

0233 2AFE00 

0236 EB 

0237 E1 

0238 C9 



TESTW: 
WLOOP: 



LOAD: 



CALL LOAD 

CALL ADCK 
RC 

MOV M,B 
CALL INXH 
RC 

JMP WLOOP 

LHLD ENDADD 
XCHG 

LHLD MEM 
RET 



;PUT TEST WORD IN MEMORY 



;GET ENDING ADDRESS 

;PUT ENDING ADDRESS IN DE 

;GET STARTING ADDRESS 



READ AND CHECK TEST MEMORY FOR TEST WORD 
TESTR : 



TESTADR : 



RLOOP: 



LHLD MEM 
SHLD TESTLOC 

» 

CALL CSTAT 

CALL ADCK 
RC 

MOV A,M 
CMP B 
CNZ ERROR 
CALL INXH 
RC 

JMP RLOOP 



QUERY CONSOLE FOR STATUS 
CSTAT: 

PUSH H 
PUSH B 
CALL JCONS 
ORA A 
JZ NOKEY 
CALL JCONI 
CPI » ' 
JZ RETURN 

NOKEY: 

POP B 

LHLD ENDADD 
XCHG 
POP H 
RET 

ADDRESS LIMIT CHECK 
ADCK: 



; CHECK SHOULD BE 



;SEE IF KEY STRUCK 
;SET FLAGS 

;GET KEY 
;EXIT IF SPACE 



;GET STARTING ADDRESS 



0239 7A 



MOV A ,D 



-A4- 



023A 94 
02 3B D8 
023C CO 
023D 7B 
023E 95 
023F C9 

0240 C5 

0241 010100 

0244 09 

0245 C1 

0246 C9 



0247 7A 

0248 OF 

0249 OF 
02 4 A OF 
024B OF 
024C E60F 
024E CD5802 
0251 3E0F 

0253 A2 

0254 CD5802 

0257 C9 

0258 C630 
025A FE3A 
025C FA610? 
025F C607 

0261 4F 

0262 CD0901 
0265 C9 



INXH: 



SUB H 

RC 

RNZ 

MOV A,E 
SUB L 
RET 

PUSH B 
LXI B,1 
DAD B 
POP B 
RET 



CONVERT REG. D TO HEX ASCII 



CNVT: 



CNV: 



DONE: 



MOV A,D 

RRC 

RRC 

RRC 

RRC 

ANI OFH 
CALL CNV 
MVI A, OFH 
ANA D 
CALL CNV 
RET 

ADI 30H 
CPI 3AH 
JM DONE 
ADI 7 

MOV C,A 
CALL CONO 
RET 



;GET HIGH NIBBLE 



;MAKE NIBBLE ASCII 

;GET LOW NIBBLE 
;MAKE ASCII NIBBLE 



ROTTST: 



0266 


F5 


PUSH PSW 


0267 


CDF 101 


CALL TESTW 


026A 


F1 


POP PSW 


026B 


F5 


PUSH PSW 


026C 


CD0802 


CALL TESTR 


02 6F 


F1 


POP PSW 


0270 


07 


RLC 


0271 


C9 


RET 






ADTEST: 


0272 


CDF 101 


CALL TESTW 


0275 


78 


MOV A,B 


0276 


32F800 


STA TESTWORD 


0279 


CD0002 


CALL LOAD 


027C 


2F 


CMA 


027D 


77 


MOV M, A 


027E 


22FA00 


SHLD TESTLOC 


0281 


23 


INX H 


0282 


CD0E02 


CALL TESTADR 


0285 


010100 


LXI B,1 



;FILL MEMORY WITH TEST WORD 
;SAVE TEST WORD 



; START ADDR. LSB ON 



-AS- 



L00P4: 



0288 2AFC00 
028B 09 
028C D8 
028D 7A 
028E 94 
028F D8 
0290 C29602 

0293 7B 

0294 95 

0295 D8 



0296 
0299 
029A 
029B 
029C 
029D 
02A0 
02 A 3 
02A6 
02A9 
02AA 
02AB 
02AC 
02AD 
02AE 



3AF800 

C5 

47 

2F 

77 

22FA00 

CD4002 

DAB 102 

CD0E02 

E1 

29 

D8 

44 

4D 

C38802 



INXHA: 



OVERFL: 



02B1 C1 
02B2 C9 



LHLD MEM 
DAD B 
RC 

MOV A,D 
SUB H 
RC 

JNZ INXHA 
MOV A,E 
SUB L 
RC 

LDA TESTWORD 
PUSH B 
MOV B,A 
CMA 

MOV M, A 
SHLD TESTLOC 
CALL INXH 
JC OVERFL 
CALL TESTADR 
POP H 
DAD H 
RC 

MOV B,H 
MOV C,L 
JMP L00P4 

POP B 
RET 



{ROLLED OVER 65K 
;GET TEST ADDR 
;PAST END? 
;KEEP GOING IF NO 



CARRY 



; INVERT BITS 

; WRITE TO TEST MEMORY 



;TEST 



GETBYT: 



02B3 
02B6 
02B7 
02B9 
02BC 
02BF 
02C2 
02C3 
02C4 
02C5 
02C6 
02C7 
02C8 
02CB 
02CC 
02CF 
02D2 
02D5 
02D6 



CDD702 
C8 

FE20 

CA8E03 

CDE502 

F2F902 

OF 

OF 

OF 

OF 

5F 

D5 

CDD702 
D1 

CAF902 

CDE502 

F2F902 

B3 

C9 



02D7 CD0301 
02DA FEOD 
02DC 37 
02DD C8 
02DE F5 



CHAR: 



CALL CHAR 
RZ 

CPI ' • 

JZ RETURN 

CALL ATOH 

JP REENTER 

RRC 

RRC 

RRC 

RRC 

MOV E, A 
PUSH D 
CALL CHAR 
POP D 

JZ REENTER 
CALL ATOH 
JP REENTER 
OR A E 
RET 

CALL JCONI 
CPI ODH 
STC 
RZ 

PUSH PSW 



; EXIT IF SPACE 



;SET CARRY FLAG (MAYBE CR) 



A6- 



02DF 4F 
02E0 CD0901 
02E3 F1 
02E4 C9 

02E5 D630 
02E7 FAF702 
02EA FEOA 
02EC F8 
02ED D607 
02EF FEOA 
02F1 FAF702 
02F4 FE10 
02F6 F8 

02F7 AF 
02F8 C9 

02F9 E1 
02FA 114504 
02FD CDE601 



0300 CDB302 

0303 D8 

0304 67 

0305 E5 

0306 CDB302 
0309 E1 
030A 6F 
030B C9 



03 OC 5F 
030D 1602 
030F CD3003 
0312 0602 

0314 1604 

0316 7B 

0317 17 

0318 5F 

0319 0E30 
03 1B D22003 
031E 0E?1 

0320 CD0901 

0323 15 

0324 C21603 
0327 CD3803 
032A 05 
032B C21403 



ATOH: 



BAD: 



REENTER: 



MOV C,A 
CALL CONO 
POP PSW 
RET 

SUI 30H 
JM BAD 
CPI OAH 
RM 

SUI 7 
CPI OAH 
JM BAD 
CPI 10H 
RM 

XRA A 
RET 

1 
1 

POP H 

LXI D , IEMSG 
CALL PMSG 



;SET ZERO FLAG 
;FIX STACK 



INPUT 4 HEX VALUES FROM CONSOLE 
GETADD: 

CALL GETBYT 
RC 

MOV H, A 
PUSH H 
CALL GETBYT 
POP H 
MOV L,A 
RET 

PRINT REG-A IN BINARY 
CNVTB: 



PNIBB: 



ALLBIT: 



ZERO: 



MOV E, A 
MVI D,2 
CALL TLOP 
MVI B,2 

MVI D,4 

MOV A,E 
RAL 

MOV E, A 
MVI C.30H 
JNC ZERO 
MVI C,31H 

CALL CONO 
DCR D 
JNZ ALLBIT 
CALL SPACE 
DCR B 
JNZ PNIBB 



;SAVE A 
;TWO SPACES 

; NIBBLE COUNT 



; RESTORE A 

;o 
;1 



; PRINT SPACE 



-A7- 



032E 1604 

0330 CD3803 

0333 15 

0334 C23003 

0337 C9 

0338 0E20 
033A C5 
033B CD0901 
033E C1 
033F C9 



0340 119404 
0343 CDE601 
0346 2AF500 
0349 22F300 
034C 22FA00 
034F CD0002 

0352 CD7E03 

0355 70 

0356 CD3902 
0359 CA6003 
035C 23 
035D C35203 



TAB: 
TLOP: 

SPACE: 



MVI D,4 

CALL SPACE 
DCR D 
JNZ TLOP 
RET 

MVI C, f ' 
PUSH B 
CALL CONO 
POP B 
RET 



RANDOM NUMDER TEST 

WRITE RANDOM NUMBERS 
RNDW: 

LXI D , RMSG 
CALL PMSG 
LHLD SEED 
SHLD SEEDST 
SHLD TESTLOC 
CALL LOAD 

RNDWL : 

CALL RND 
MOV M,B 
CALL ADCK 
JZ RNDR 
INX H 
JMP RNDWL 

•READ AND CHECK RANDOM NUMBERS 
RNDR: 



;GET OLD SEED 
;SAVE IT FOR LATER 



0360 


CD2102 


CALL CSTAT 


0363 


2AF300 


LHLD SEEDST 


0366 


22F500 


SHLD SEED 


0369 


CD0002 


CALL LOAD 






RNDRL: 


036C 


CD7E03 


CALL RND 


036F 


7E 


MOV A,M 


0370 


B8 


CMP B 


0371 


C49601 


CNZ ERROR 


0374 


CD3902 


CALL ADCK 


0377 


CA8D01 


JZ DONER 


037A 


23 


INX H 


037B 


C36C03 


JMP RNDRL 






; GENERATE RANDOM NUf 






RND: 


037E 


E5 


PUSH H 


037F 


2AF500 


LHLD SEED 


0382 


7D 


MOV A,L 


0383 


AC 


XRA H 


0384 


47 


MOV B, A 


0385 


07 


RLC 


0386 


6F 


MOV L,A 



; START WITH SAME SEED 
;PASS SEED TO GENERATOR 
;GET TEST ADDRESS 



-A8- 



0387 


84 


ADD 


H 


Cooo 


67 


MOV 


H, A 


O3o9 


22F500 


SHLD SEED 


m Op 

03oC 


E1 


POP 


H 


038D 


C9 


RET 




RETURN: 






038E 


31F100 


LXI 


SP, STACK 


0391 


C30000 


JMP 


MONITOR 




•MESSAGES 




0394 


0A0D4D454DSIG: 


DB 


OAH , ODH , 


03A4 


0A0D004C4FMSG1: 


DB 


0AH,0DH,0 


03AF 


202053484F 


DB 


• SHOULD 


03C8 


0A0D00 


DB 


OAH, ODH, 0 


03CB 


0A0D224352MSG4: 


DB 


OAH, ODH, 


03F1 


0A0D544553MSGOK: 


DB 


OAH, ODH, '' 


0401 


0A0D535441SMSG: 


DB 


OAH, ODH, 1 


0423 


0A0D454E44EMSG: 


DB 


OAH, ODH, »] 


0445 


0A0D494E50IEMSG: 


DB 


OAH, ODH, 1 


045C 


0A0D424954TEST1: 


DB 


OAH, ODH, f ] 


046D 


0A0D53484FTEST3: 


DB 


OAH, ODH, ' 


0480 


0A0D414444TEST4: 


DB 


OAH , ODH , 1 j 


0494 


0A0D52414ERMSG: 


DB 


OAH, ODH, '] 



04A9 31F100 



WAS' 

'"CR" TO CONTINUE TEST "SP" TO STOP ',0 
'TEST COMPLETE' ,0 

'STARTING ADDRESS (HEX OR "CR") ',0 
'ENDING ADDRESS (HEX OR "CR") »,0 
'INPUT ERROR RETYPE- ',0 
'BIT STUCK TEST' ,0 
'SHORTED BIT TEST' ,0 
'ADDRESS LINE TEST',0 
'RANDOM NUMBER TEST',0 



************************************************************ 

INSERT CUSTOM I/O ROUTINES HERE 
START 1 : 

;AND ANY INITIALIZATION ROUTINES HERE 

LXI SP, STACK- 15 ;SET STACK 

************************************************************ 

THESE ROUTINES ARE FOR CPM USERS 

; CONSOLE STATUS TO REG-A 
;A=FF, CHAR . READY A=0,CHAR. NOT READY 
; CONSOLE CHARACTER TO REG-A 

jCHARACTED FROM REG-C TO CONSOLE 

;GET BASE OF JUMP TABLE 



0006 




CONST 


EQU 


06H 


0009 




CONIN 


EQU 


09H 


OOOC 




CONOT 


EQU 


OCH 


04AC 


3A020C 




LDA 


2 


04AF 


320801 




STA 


JCONS+2 


04B2 


320501 




STA 


JCONI+2 


04B5 


320C01 




STA 


JCONO+2 








04B8 


C30F01 




JMP 


START2 


04BB 






END 


START 



-A9-