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C^L Reed Electronics Group 





VOICE OF THE ENGINEER 



Magnetic-field measurements 
hold the key to reducing 
dc/dc EMI 



PCI EXPRESS: faster pipe 
serves many masters 




Tales from the Cube: 

Sweating blood over 
hardware-interface 
routines Pg 36 

Milestones that 
Mattered: The rise of 
the microprocessor 
Pg30 

Analog Domain: 

Scaling, part three Pg 32 

Design Ideas Pg 83 





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schnology for Innovators and the red/black banner are trademarks of Texas Instruments. 1593A0 © 2006 Tl 

Technology for Innovators" ^ Texas Instruments 




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© 2006 Tl 



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Never stop thinking 




Hack-proof design 



46 



Security requirements now top the embedded-system 
designer's checklist as networked devices multiply and 
hackers optimize their attack techniques. 

by Warren Webb, Technical Editor 




Beyond ROHS: 

the greening 

of global markets 

f\ US and Asian governments 
are about to impose their 
V-y V-^ own versions of the EU's 
ROHS directive. Rather than targeting 
each region's regulations, manufacturers 
may standardize on the most stringent 
"green" directive. This move will affect 
even products that are exempt from 
regulation, as component manufacturers 
move away from noncompliant parts. 

by Margery Conner, 
Technical Editor 




contents 

7.20.06 



Magnetic-field 
measurements hold 
the key to reducing 
dc/dcEMI 

I - Power converters free 
/ system designers from 
I unwieldy constraints, 
but the devices radiate unspecified 
fields that can destroy the signal/ 
noise performance of sensitive 
circuits nearby. Magnetic-field 
measurements hold the key 
to finding and correcting these 
problems. by William J Bowhers, 
Merrimack College 

PCI Express: 
ever-faster graphics 
pipe serves many 
masters 



71 



The new PCI Express 
spec significantly 
improves desktop- PC 
graphics. Developers are now 
working on generation 2, which will 
further expand the graphics pipe. 

by David L Fair, Intel Corp 



DESIG 



m 



IDEAS 



:nb pwmout 

IC, 

PIC10F200/202 




Microprocessor generates programmable clock sequences 
Ceramic output capacitors enhance internally compensated integrated switchers 
Tapped inductor, boost regulator deliver high voltage 
Send your Design Ideas to edndesignideas@reedbusiness.com. 



JULY 20, 2006 



EDN 5 




^ Texas Instruments 



; banner are trademarks of Texas Instruments. 1350A0 © 2006 Tl 

Technology for Innovator; 



contents 7.20.06 



pulse 

Organic semiconductors shine 
in LED/photosensor combinations 




Dilbert 22 



22 Chip offers authentication, protection 
to single-cell battery packs 
Kit eases mobile-TV design 



Global Designer: Partners drive WiMax momentum 
across Asia; Ceramic substrate enables distributed 
processing in vehicles 



SRIO switch for base stations adds 
preprocessing function, algorithms 



Research Update: Sparks could prevent airline 
crashes; Researchers listen to the sounds of CMOS; 
Molecular electronics gel in ajar 




DEPARTMENTS 


& 


COLUMNS 


10 


EDN.comment: Contextually correct search: 
a timesaver for engineers 


30 


Milestones That Mattered: Painting 
microprocessors in broad strokes 


32 


Analog Domain: Scaling: a balanced view, 
part three 


34 


Signal Integrity: Reference-free pair 


36 


Tales from the Cube: Sweating blood 
over hardware-interface routines 


98 


Reality Check: Newton's life lesson 



PRODUCT 
ROUNDUP 



Discrete Semiconductors: MOSFETs, ultrafast 
rectifiers, high-electron-mobility transistors, high- 
temperature diodes, and more 
Test and Measurement: Measurement software, 
PCI Express analyzer, data-acquisition processor, 
and more 



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of Reed Elsevier Properties Inc, used under license. A Reed Business Information Publication/Volume 5 1, Number 15 (Printed in USA). 



JULY 20, 2006 | EDN 7 




PANEL-TO-BOARD 



1 



\ 





\ 



FT=1IJL 


1771 







online contents 

www.edn.com 





Check out these online-exclusive articles: 

Consumer Court: Blu-ray, ViiV, 
MusicGremlin, more- 
Snap judgments on new digital-consumer 
gadgets; food for thought for product 
designers. 

www.edn.com/article/CA634561 4 

UWB may yet serve whole-house video 

With yet another Ml MO flavor, newcomer 
Tzero claims to support 1 00-Mbps date 
rates to a range of 30m. 

www.edn.com/article/CA6345839 

Digital power controllers offer digital 
and analog architecture 

Since EDN last covered digital-power 
controllers, three more digital-power- 
controller ICs have appeared. 

www.edn.com/article/CA6346974 

Ingredients: Audio DSPs and microcon- 
trollers, VDSL2, HDMI 1.3, more... 

Notable new chips and components 

for engineers cooking up digital-consumer 

applications. 

www.edn.com/article/CA6349728 



designideas 

READERS SOLVE DESIGN PROBLEMS 
SUBMIT YOUR DESIGN IDEA 

The Design Ideas section (pg 83 and 
www.edn.com/designideas) remains 
one of ED/Vs most popular. But it does 
not write itself. So if you've got a good 
idea, please submit it. You could get it 
published in EDN— and make $150. 
www.edn.com/info/30988.html 



Recent articles getting high traffic 
on www.edn.com: 

Prying Eyes: breaking down a 
broken cell phone 

www.edn.com/article/CA6339254 

Toshiba spins 200-Gbyte, 
2.5-in. hard-disk drive 

www.edn.com/article/CA6340837 

Making vehicles safer 
by making them smarter 

www.edn.com/article/CA6339246 

Low-volume handheld designs: 
not for the faint of heart 

www.edn.com/article/CA6343250 

Design Idea: Microcontroller, JFET 
form low-cost, two-digit millivoltmeter 

www.edn.com/article/CA6343251 

Milestones That Mattered: 
Reference designs matter, as this TV 
design illustrates 

www.edn.com/article/CA6335296 

Design Idea: Hartley oscillator 
requires no coupled inductors 

www.edn.com/article/CA6343253 

Analog: the new black 

www.edn.com/article/CA6343254 



DESIGNING FOB THE REAL WORLD 



Our lineup of e-mail newsletters includes 
the weekly flagship, EDN Online, plus a 
slate of every-other-week newsletters 
covering specific technologies and appli- 
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samples and sign up: 

www.edn.com/subscribe.asp 

EDN Online 

The latest from EDN 

EDN on Power Technology 

Information you need about eOEM 
power technology 

EDN on Analog 

Designing for the real world 

EDN on Embedded Processing 

Algorithms, hardware, and software 
for the invisible computer 

EDN on EDA 

New tools for the new thinker 

EDN's Digital Den 

Technologies driving consumer 
electronics 

EDN on Components 

The basics for your designs 

EDN on Test 

Ensuring hardware and software design 



Sign up for ED/Vs RSS feeds and find 
out about new articles and blog posts 
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Visit this page to find all of our feeds, 
plus an introduction to the pleasures 
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www.edn.com/rss 



JULY 20, 2006 | EDN 




EDN. COMMENT & 




BY MAURY WRIGHT, EDITOR IN CHIEF 



Contextually correct search: 
a timesaver for engineers 

f you've recently visited our Web site, www.edn.com, you may have 
noticed a new search feature, Zibb, in a rectangular, blue box near 
the top of the page. Our parent company, Reed Business 
Information, developed Zibb, a search engine that aims to provide 
contextually correct searches and promises to save users time by 
returning only relevant search results. 
We know from our ongoing research efforts that you constantly use 
search engines in your daily work. And, like the world at large, engi- 
neers primarily use Google, although some also use other options, such 
as Yahoo and Ask. In fact, you have told us that you will use Google to 
find information on a vendor's Web site, because Google can often get 
you to the correct place faster than the vendor's own site search. And 
we know that many of you use Google to find articles on our site and 
come to visit following a Google link. 

EDN and Reed Business appreciate 
Google and the traffic that it brings us. 
In fact, our company has partnered 
with Google on several initiatives. But 
we also know that Google isn't perfect. 
There are still many words that we use 
in the tech industry that have far dif- 
ferent meanings when you use them in 
broader society. As good as Google is, 
it often delivers more meaningless 
links than relevant ones on tech-cen- 
tric searches. We believed that we 
could develop an industry-centric 
search engine to serve vertical com- 
munities, such as electronics. The 
result is Zibb, and a couple of months 
ago, EDN became the first site in the 



Reed universe to roll out the engine. 

We rely on the Zibb technology both 
to greatly improve our site search and 
to provide contextually correct, 
broader industry searches. The Zibb 
box that appears on every EDN Web 
page is simply a site search. We pres- 
ent it that way because we have many 
regular visitors who have long used our 
site-search facility on each page. Hav- 
ing Zibb on each page provides the 
exact same user interface that the old 
site search offered. But try it, and I 
think you will agree that it performs far 
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If you click on the Zibb logo to the 
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edn.com/zibb), you will reach a 
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tional capabilities. You will reach a 
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search page offers tabs above the search 
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The default tab is the EDN site 
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Search, which focuses on product and 
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tially the Zibb equivalent of the 
Google default search. A Web search 
on Zibb, however, searches only in- 
dustry vendors, standards bodies, trade 
associations, trade publications, and 
other relevant sites. 

I encourage you to give Zibb a try. 
And please let me know what you 
think. If Zibb fails to turn up a site that 
should be in our database, I want to 
know. We want to hear both the bad 
news and the good. I believe that Zibb 
will save you time in your electronics- 
industry searches. But if it doesn't, tell 
us about it, so that we can try to make 
it better.EDN 



You can reach me at 1 -858-748-6785 or 
mgwright@edn . com . 



Zibb 

Strictly electronics 



NEWS PRODUCTS COMPANIES WEB 



\RCH » 



10 EDN | JULY 20, 2006 



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Smart Power Modules: where energy is critical, 
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For more information on our SPM products, 
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AUTOMATICALLY-GENERATED CODE FLYING AT MACH 9.8. 



THAT'S MODEL-BASED DESIGN. 



When NASA made history by 
launching the X-43A, 
automatically-generated flight code 
was at the controls for the vehicle's 
propulsion and stability systems. 
Engineers developed the autopilot 
within a radically reduced timeframe 
using Model-Based Design and 
Simulink. To learn more, go to 
mathworks. com/mbd 



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PUBLISHER, 
EDN WORLDWIDE 

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EDITOR IN CHIEF 

Maury Wright 
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MANAGING EDITOR 

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SENIOR ART DIRECTOR 

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EMBEDDED SYSTEMS 

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ANALOG 

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EDA, MEMORY, 
PROGRAMMABLE LOGIC 

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MASS STORAGE, MULTIMEDIA, 
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POWER SOURCES, 
ONLINE INITIATIVES 

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mconner@connerbase.com 

DESIGN IDEAS EDITOR 

Brad Thompson 
edndesignideas@reedbusiness.com 

SENIOR ASSOCIATE EDITOR 

Frances T Granville, 1-781-734-8439; 
fax: 1-781-290-3439; 
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EDN EUROPE 

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EDN CHINA 

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EDN JAPAN 

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The EDN Editorial Advisory Board serves as an 
industry touchstone for the editors of EDN world- 
wide, helping to identify key trends and voicing 
the concerns of the engineering community. 

DENNIS BROPHY 

Director of Business Development 
Mentor Graphics 

DANIS CARTER 

Principal Engineer, Tyco Healthcare 

CHARLES CLARK 

Technical Fellow, Pratt & Whitney Rocketdyne 

DMITRII LOUKIANOV 

System Architect Intel 

RON MANCINI 

Engineer 

GABRIEL PATULEA 

Design Engineer, Cisco 

MIHIR RAVEL 

VP Technology, National Instruments 

DAVE ROBERTSON 

Product Line Director, Analog Devices 

SCOTT SMYERS 

VP Network and System Architecture Division, 
Sony 

TOM SZOLYGA 

Program Manager, Hewlett-Packard 

JIM WILLIAMS 

Staff Scientist, Linear Technology 



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® TAITRONICS 
AUTUMN 

Taipei International Electronics Autumn Show 

October 9-13, 2006 

Taipei World Trade Center Exhibition Halls 1, 2, & 3 

FEATURING 



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Virtex™-5 FPGAs feature ExpressFabric™ technology on 65nm triple-oxide 
process. This new fabric offers the industry's first LUT with six independent 
inputs for fewer logic levels, and advanced diagonal interconnect to enable 
the shortest, fastest routing. Now you can achieve 30% higher 
performance, while reducing dynamic power by 35% and area by 45% 
compared to previous generations. 

Design systems faster than ever before 

Shipping now, Virtex-5 LX is the first of four platforms optimized for 
logic, DSP, processing, and serial. The LX platform offers 330,000 logic 
cells and 1,200 user l/Os, plus hardened 550 MHz IP blocks. Build deepe 
FIFOs with 36 Kbit block RAMs. Achieve 1.25 Gbps on all l/Os without 
restrictions, and make reliable memory interfacing easier with enhanced 
ChipSync™ technology. Solve SI challenges and simplify PCB layout with our 
sparse chevron packaging. And enable greater DSP precision and dynamic 
range with 550 MHz, 25x18 MACs. 

Visit www.xilinx.com/virtex5, view the TechOnline webcast, and give 
your next design the ultimate in performance. 




£XIUNX S 

The Programmable Logic Company™ 

www.xilinx.com/virtex5 



The Ultimate^^sten^nte^rat^ 



©2006 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. 



ANALOG edge' 

Expert tips, tricks, and techniques for analog designs 



Vol. IV, Issue 7 



design!^ W 



Improving Video Clock Generation in Modern 
Broadcast Video Systems 

By Alan Ocampo, Applications Engineer 



Analog input 
SD/HDTV 



Vertical Sync 
Composite Sync 
Burst/Back Porch 
Odd/Even Field 



Video Clock Generator 





Hsync 









Horizontal Sync 
(Hysnc) 



Pixel Clock 
SD:27MHz 
HD: 74.25 or 
74.25/1.001 MHz 



Jitter 
Cleaning 
FPGA/PLL 
Circuit 



Low Jitter 
Reference Clock 



SMPTE 

Parallel Video -h 

Data Input 



SDI 

Serializer 



SDI Output 
SD: 270 Mbps 
HD: 1.485 or 
1.485/1.001 Gbps 



Figure 1. SDI Reference Clock Generator Block Diagram 



The old adage "timing is everything" is well embod- 
ied in the modern broadcast studio, where precise 
timing of video clock and synchronization signals 
are essential to create, acquire, edit, and distribute analog 
and digital video. Today's broadcast systems must support 
industry-standard SD/HD formats, such as NTSC, PAL, 
720p, 1080i, and 1080p, over analog and digital interfaces 
such as composite, component, and Serial Digital Interface 
(SDI). With high-speed SDI video equipment being 
increasingly used throughout the studio, improved video 
sync separation can more effectively produce video clocks 
with low jitter, which is crucial to meeting the stringent 
specifications of new SDI standards. 

A video clock generator which generates various timing and 
clock signals from an analog video input consists of a video 
sync separator and Phase-Locked Loop (PLL). These two 
circuits are illustrated in the SDI application block diagram 
in Figure 1. 



NEXT ISSU 




Powering Signal-Path Products 



The video sync separator accepts a 1 Vp_p analog video input 
with bi-level or tri-level sync and extracts the standard timing 
signals, such as Horizontal (Hsync), vertical, and composite 
sync, burst/back porch, and odd/even field outputs. To meet 
strict timing requirements of the latest HDTV standards, 
specifications such as HD tri-level sync separation, low out- 
put propagation delay, and 50% sync slicing are imperative. 
The latter ensures precise sync extraction by slicing at the 
proper 50% point of the bi-level or tri-level sync reference 
edges. This provides for improved Hsync jitter performance 
compared to non-adaptive, fixed-level sync slicing, even 
under irregular input conditions such as double or no 75 Q 
load termination or transmission loss. Hsync jitter is defined 
here as the peak-to-peak time variance in Hsync's falling-edge 
with respect to the inputs sync reference-edge and is critical 
to the performance of the pixel clocks generated by the 
subsequent PLL block. 

J^J Na t ion a I 

J/r Semiconductor 

The Sight & Sound of Information 



Featured Products 



Multi-Format Video Sync Separator 

The LMH1981 is a multi-format sync separator for high-defini- 
tion broadcast and professional video systems. The device 
automatically detects the input video format and performs all 
the necessary sync separation to generate low-jitter horizontal 
and vertical sync signals for standard and high-definition video 
formats, including NTSC, PAL, SECAM, 480i, 480p, 576i, 576p, 
720p, 1080i,and 1080p. 

The LMH1981 features the timing outputs needed for any video 
system, including horizontal, vertical and composite sync, 
odd/even field, burst/back porch clamp, and a patented auto- 
matic video-format detection feature. The device accepts both 
bi- and tri-level sync video inputs and features 50% slicing to 
ensure accurate separation of signals that vary in amplitude, 
offset, and noise. The device has a wide input range, allowing 
the inputs to accept video signals from 500 mV P . P to 2 V P . P . 




Features 

■ 50% sync slicing 

■ Low jitter horizontal sync output 

■ Supports NTSC, PAL, SECAM, 480i, 480p, 576i, 576p, 
720p, 1080i,and 1080p 

■ Accepts video signals from 500 mV P . P to 2 V P . P 

■ No external programming with pC required 

■ Horizontal sync output propagation delay <50 ns 

The LMH1981 is ideal for use in a wide range of video 
applications such as, broadcast video equipment, video 
distribution, DTV and HDTV systems, and is available in 
TSSOP-14 packaging. 

For FREE samples, datasheets, and more, visit 
www.national.com/pf/LM/LMH1981.html 




Adaptive Cable Equalizer 

The LMH0044 adaptive 
cable equalizer is a 
monolithic integrated 
circuit for equalizing 
data transmitted over 
cable (or any media with 
similar dispersive loss 
characteristics). The 
equalizer operates over 
a wide range of data 
rates from 143 Mbps to 1.485 Gbps and supports SMPTE 292M, 
SMPTE 344M, and SMPTE 259M. This device implements DC 
restoration to correctly handle pathological data conditions (DC 
restoration may be bypassed for low data rate applications). The 
equalizer may be driven in either a single-ended or differential 
configuration. 

Additional features include separate carrier detect and output 
mute pins which may be tied together to mute the output when 
no signal is present. A programmable mute reference is provided 
to mute the output at a selectable level of signal degradation. 

Features 

■ SMPTE 292M, SMPTE 344M, and SMPTE 259M compliant 

■ High data rates: 143 Mbps to 1.485 Gbps 

■ Equalizes up to 200m of Belden 1 694A at 1 .485 Gbps or up 
to 400m of Belden 1694A at 270 Mbps 

■ 208 mW typical power consumption with 3.3V supply 

■ Manual bypass and output mute with a programmable 
threshold 

■ Single-ended or differential input 

■ Supports DVB-ASI at 270 Mbps 

■ 50Q differential outputs 

■ Single 3.3V supply operation 

The LMH0044 is ideal for SMPTE 292M/344M/259M serial 
interfaces, serial digital data equalization and reception, and 
data recovery equalization. The LMH0044 is available in 
LLP-16 packaging. 

For FREE samples, datasheets, and more, visit 
www.national.com/pf/LM/LMH0044.html 



edge.national.com 



ANALOG | edge 



Improving Video Clock Generation in Modern Broadcast Video Systems 



The PLL block can generate one or more pixel clocks, which 
should be phase-locked to the leading-edge of Hsync, the 
PLL's reference input. To produce both SD and HD pixel 
clocks will require two PLLs, both designed to give the 
appropriate output frequency for any given Hsync 
frequency. Since the PLL derives a higher frequency pixel 
clock from a lower frequency Hsync, pixel clock jitter will be 
determined by different sources at different frequencies. 
Below the loop bandwidth, the clock jitter output by the PLL 
will be dominated by Hsync jitter, which can be a significant 
amount depending on the performance and quality of 
the sync separator. Above the loop bandwidth, it will be dom- 
inated by its PLL oscillator, typically a Voltage-Controlled 
Crystal Oscillator (VCXO) chosen properly for low phase 
noise and frequency tuning, among other characteristics. 

In the block diagram, a pixel clock generator is used to 
derive a reference clock for an SDI serializer which receives 
SMPTE-compliant parallel digital video data and then 
encodes, serializes, and transmits uncompressed serial 
digital video over coax cable. A serializer requires a clean 
reference clock for its internal PLL to generate a bit rate 
clock that maintains the serializer and clocks its output 
bit-stream. If used to directly clock the serializer, any jitter 
on the reference clock could potentially transfer to the bit 
rate clock and consequently appear as SDI output jitter. As 
shown in Table 7, SDI formats use increasingly high data 
rates and thus require clock sources with sufficient jitter 
performance. 

For example, SMPTE 292M specifies the "timing" and 
"alignment" jitter requirements for an HD-SDI serializers 
output bit-stream. Referring to the table, timing jitter should 
not be more than 1.0 UP for jitter frequency components 
from Bl to B3, or 10 Hz to 1485 MHz, per SMPTE 292M. 
Alignment jitter — which is the high-frequency subset of 
timing jitter — should be no more than 0.2 UI from B2 
(100 kHz) to B3. Outside of their respective frequency 
limits, both the timing and alignment jitter specifications roll 



off at 20 dB per decade. Output jitter above the jitter 
specifications can result in degradation of error performance 
at the SDI deserializer. Please see the SDI standards for 
more information. 

The stringent jitter specifications of SDI standards demon- 
strate the profound need for a low-jitter pixel clock. In most 
cases, however, a generated pixel clock will have an intoler- 
able amount of jitter, up to 6 nsp_p for a typical SD pixel 
clock, which precludes direct application as a reference 
clock. Jitter reduction is therefore required to improve such 
unacceptable clock performance. The most common way 
to reduce pixel clock jitter is to use jitter-cleaning circuitry, 
usually implemented with additional Field-Programmable 
Gate Array (FPGA) or PLL stages. While jitter-cleaning 
circuitry is routinely applied by system designers, this can 
add significantly to component count, PCB area, power, 
and design cost and time. 

A more effective way to reduce pixel clock jitter and thus 
improve SDI output jitter is to use a broadcast-quality 
video sync separator that has very low Hsync jitter, such as 
the LMH1981. This improved performance gives designers 
the flexibility to use smaller FPGAs or otherwise reduce 
jitter-cleaning circuitry and still produce an SDI output 
that complies to the jitter specifications. 

Although broadcast systems are rapidly transitioning to 
high-speed SDI formats, the need to generate accurate 
video clocks from analog sources to process digital video 
data will be around for years to come. Current solutions 
require extensive jitter-cleaning circuits for generating an 
accurate reference clock to produce a SMPTE-compliant 
SDI output. However, the most fundamental and effective 
solution is to minimize jitter on the most critical timing 
reference, Hsync. This can only be accomplished using a 
high-performance analog video sync separator such as the 
LMH1981 in the clock generation signal path because, as 
we now know, timing is everything. ■ 

Access interactive broadcast video solutions diagrams at 
solutions.national.com 



Table 1 



Format 


Standard 


Bit Rate 


Output Timing Jitter 
(Bl to B3)* 


Output Alignment Jitter 
(B2 to B3)* 


SD-SDI Standard- definition 


SMPTE 259M, 334M 


270 Mbps, others not 
widely used 


1.0 UI 1 or 3.7 nsp.p 


0.2 UI or 740 ps p _ p 


HD-SDI High-Definition; 
HD/SD-SDI Mulit-rate 


SMPTE 292M 


1.485 Gbps 
1.485/1.001 Gbps 


1.0 UI or 673 ps p _ p 


0.2 UI or 135 ps p _ p 


3-Gbps SDI up to 1080p/60 
over a single link 


SMPTE 424M 


2.970 Gbps 
2.970/1.001 Gbps 


2.0 UI or 673 ps p _ p 


0.3 UI maximum, 
0.2 UI recommended 



*B1 , B2, and B3 are the jitter frequency band limits specified in the SMPTE standards. 
1 0ne UI, or Unit Interval, is equal to one bit period ( 1 /bit rate) of the serial bit-stream. 



edge.national.com 



Featured Products 




Digital Video Serializer with Ancilliary Data 
FIFO and Integrated Cable Driver 

The LMH0030 is a monolithic integrated circuit that encodes, 
serializes, and transmits bit-parallel digital video data. The serial 
data clock frequency is internally generated and requires no 
external frequency setting, trimming, or filtering components. The 
LMH0030 performs functions which include: parallel-to-serial 
data conversion, SMPTE standard data encoding, NRZ to NRZI 

data format conver- 
sion, serial data 
clock generation and 
encoding with the 
serial data, automat- 
ic video rate and 
format detection, 
ancillary data packet 
management and 
insertion, and serial 
data output driving. 

Features 

■ SDTV/HDTV serial digital video standard compliant 

■ Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.4835 Gbps, 
and 1.485 Gbps SDV data rates with auto-detection 

■ Low output jitter: 85 ps (typ), 125 ps (max) 

■ Low power consumption: 430 mW (typ) from 3.3V 

■ No external VCO required 

■ Fast PLL lock time: < 1 50 ps (typ) at 1 .485 Gbps 

■ LVCMOS compatible data and control inputs and outputs 

■ 75Q ECL-compatible, differential, serial cable-driver outputs 

■ 3.3V I/O power supply and 2.5V logic power supply operation 

The LMH0030 SDTV/HDTV serial-to-parallel digital video 
interfaces for video cameras, VTRs, telecines, digital video 
routers and switchers, digital video processing and editing 
equipment, video test pattern generators and digital video 
test equipment, and video signal generators. The LMH0030 is 
available in TQFP-64 packaging. 

For FREE samples, datasheets, and more, visit 
www.national.com/pf/LM/LMH0030.html 







Na t ion a I 

Semiconductor 

The Sight & Sound of Information 



Digital Video Deserializer / Descrambler with 
Video and Ancillary Data FIFOs 




The LMH0031 is a monolithic integrated circuit that deserializes 
and decodes SMPTE 292M, 1.485 Gbps (or 1.483 Gbps) serial 
component video data, to 20-bit parallel data with a synchronized 
parallel word-rate clock. It also deserializes and decodes SMPTE 
259M, 270 Mbps, 360 Mbps, and SMPTE 344M (proposed) 
540 Mbps serial component video data, to 10-bit parallel data. 
Functions performed by the LMH0031 include clock/data recovery 
from the serial data, serial-to-parallel data conversion, SMPTE 
standard data decoding, NRZI-to-NRZ conversion, parallel data 
clock generation, word framing, CRC and EDH data checking and 
handling, Ancillary Data extraction, and automatic video 
format determination. 

Features 

■ SDTV/HDTV serial digital video standard compliant 

■ Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.483 Gbps, 
and 1.485 Gbps serial video data rates with auto-detection 

■ Low power: 850 mW (typ) 

■ Uses 27 MHz crystal or clock oscillator reference 

■ Fast VCO lock time: < 500 ps at 1 .485 Gbps 

■ Built-in self-test and video test pattern generator 

■ LVDS and ECL-compatible, differential, serial inputs 

■ 3.3V I/O power supply and 2.5V logic power supply operation 

The LMH0031 SDTV/HDTV serial-to-parallel digital video 
interfaces for video editing equipment, VTRs, standard converters, 
digital video routers and switchers, digital video processing and 
editing equipment, video test pattern generators and digital video 
test equipment, and video signal generators. Operating over the 
commercial temperature range (0°C to +70°C), the LMH0031 is 
available in TQFP-64 packaging. 

For FREE samples, datasheets, and more, visit 
www.national.com/pf/LM/LMH0031.html 



© National Semiconductor Corporation, 2006. National Semiconductor, LLP, and LMH are registered trademarks and Analog Edge is a service 
mark of National Semiconductor Corporation. All other brand or product names are trademarks or registered trademarks of their respective holders. 

570102-035 



EDITED BY FRAN GRANVILLE 




INNOVATIONS & INNOVATORS 



Organic semiconductors shine 
in LED/photosensor combinations 



Silicon circuits provide 
high-speed switching 
of many tiny circuits 
and are good for use in small 
LEDs and photodiodes. Silicon 
has limitations, however, for 
systems that need to be 
cheap, environmentally friend- 
ly, disposable, and maybe even 
bendable. Organic circuits, on 
the other hand, excel in these 
areas. Incorporating technolo- 
gy whose developers ultimate- 
ly won the Nobel Prize in 
chemistry in 2000, these cir- 
cuits comprise a conductive- 
polymer compound that manu- 
facturers can apply in a thick- 
film process with the same 
technology that ink-jet printers 
use. 

Organic semiconductors will 
not replace silicon because 
they're not particularly fast and 
they don't support the fine-line 
geometries of silicon. How- 
ever, they bear watching if you 
want inexpensive, perhaps dis- 
posable, or large-area LEDs or 
photosensors. 

Klaus Schroeter, chief exec- 
utive officer of Austrian start- 
up Nanoident, says that a com- 
mon OLED (organic-LED)— at 
5X5 mm-is too big to be 
practical in silicon, but, he 
claims, is cheap and easy with 
organics. OLEDs are already 
finding use in displays for em- 
bedded systems. Organic de- 




The organic-semiconductor-based Photonics Solution Platform of- 
fers spectral-sensitivity ranges from infrared through the visible- 
light spectrum, depending on the formulation of the organic mate- 
rial, which also determines the photodiodes' dark current and dy- 
namic range. 



vices are also intriguing for use 
in image sensors because, just 
by changing the voltage polar- 
ity on an OLED, you can 
change it from a light source to 
a light sensor. For example, you 
could integrate a fingerprint 
sensor into a display: If you 
touch the display, you can ver- 
ify not only the fingerprint, but 
also the finger's hemoglobin 
count, verifying the fact that 
the finger is alive and thereby 
foiling the authors of numer- 
ous movies and books whose 
bad guys trick identification 
units with severed body parts. 

Nanoident claims to be the 
first to develop organic-semi- 



conductor-based optoelectron- 
ics. The company's new 
Photonics Solution Platform al- 
lows you to design image sen- 
sors combining LEDs, photo- 
sensors, and simple IC func- 
tions, such as amplifiers. You 
can start with either a discrete 
or an array-based photosensor, 
add an LED array for an illumi- 
nation source, and top it off 
with any necessary amplifiers 
or simple decision-making log- 
ic. If you need serious number- 
crunching ability, you can add a 
conventional microprocessor 
chip onto the sensor. Work up 
the sensor design in collabora- 
tion with Nanoident, and the 



Photonic Solution Platform de- 
livers the circuit design and 
component parameters. Nanoi- 
dent then prints the circuit, in- 
cluding components, on sur- 
faces such as foil, glass, paper, 
and pc boards. 

The display resolutions range 
from 250 to 1000 dpi. The 
spectral sensitivity ranges 
from infrared through the visi- 
ble-light spectrum, depending 
on the formulation of the or- 
ganic material, which also de- 
termines the photodiodes' 
dark current and dynamic 
range. A representative price 
for a fingerprint-swipe sensor 
for a high-volume consumer 
product, such as a cell phone, 
is less than $2. 

Organic semiconductors 
even offer a "green-power" 
hook: Photovoltaics are close 
relatives of photodiodes, and 
several companies, including 
Nanosolar (www.nanosolar. 
com) and Konarka Technol- 
ogies (www.konarka.com), are 
working to exploit the cheap- 
production aspects of organ- 
ics. Although organic devices 
are currently about an order of 
magnitude or so less efficient 
than silicon-based photovol- 
taics, organic photovoltaics 
are so cheap to manufacture 
that the low cost of ownership 
and the rapid payback period 
more than offset their relative 
inefficiency. 

-by Margery Conner 

Nanoident, www. 
nanoident.com. 



JULY 20, 2006 | EDN 21 



Kit eases 

mobile-TV 

design 

Frontier Silicon's latest 
evaluation kit allows de- 
signers to test and meas- 
ure the performance of 
the company's Apollo RF 
receiver and Kino 2 chip 
set for mobile-TV applica- 
tions. The Troy kit receives 
a T-DMB (terrestrial digi- 
tal-m u Iti med ia-broadcast- 
ing) RF signal on Band III 
and the L Band and deliv- 
ers an MPEG-2 transport 
stream to a host proces- 
sor for audio and video 
decoding. Troy can simul- 
taneously process as 
many as four T-DMB 
streams and display each 
one in a separate player 
window on the PC. 

Although the kit allows 
a standard PC to act as 
the host processor, the in- 
terface connector sup- 
ports multiple supply volt- 
ages and signals for con- 
nection to all popular me- 
dia-processor-develop- 
ment kits. Available now, 
the Troy evaluation kit 
sells for $1400. 

-by Warren Webb 

Frontier Silicon, 
www.frontier-silicon.com. 



A new evaluation kit allows 
designers to measure the 
performance of Frontier 
Silicon's multistandard mo- 
bile-TV chip set using a 
desktop PC. 



u 



Ise 



Chip offers authentication, protection 
to single-cell battery packs 



Cell-phone battery 
gauges are neither ac- 
curate nor consistent: 
The battery-charge symbol 
seems to relate only coinciden- 
tal^ to battery charge, causing 
users to charge their phones 
when they don't need to, con- 
sequently reducing battery life. 
However, as the newest gener- 
ation of cell phones moves into 
a more intensive data-usage 
model, service providers are 
demanding that battery packs 
have more intelligence. They 
fear that counterfeit battery 
packs will explode in phones 
carrying the providers' brand 
names, making them liable to 
expensive lawsuits. Meanwhile, 
some users suggest that ven- 
dors are requiring battery au- 
thentication to protect them- 
selves from after-market bat- 
tery-pack sales (see the online 
Feedback Loop for "Friend or 
foe: Battery-authentication ICs 
separate the good guys from 
the bad," EDN, Feb 2, 2006, 
pg 59, www.edn.com/article/ 
CA6301616). 

However, Brian Rush, busi- 
ness manager for Maxim's 
fuel-gauge line, disagrees with 
these users' viewpoint. Ser- 
vice vendors, such as Verizon 
(www.verizon.com), are liable 
in a battery- related accident, 
he says, so they are pressur- 
ing equipment vendors to 



provide battery authentica- 
tion. In addition, both equip- 
ment and service vendors 
want to preserve their brand 
integrity. So, Maxim and oth- 
er vendors are setting the 
stage for a new generation of 
fuel gauges targeting one- 
cell battery packs in cell 
phones. Maxim claims that its 
new DS2790 fuel gauge is 
the first single-chip approach 
offering accurate battery- 
fuel-gauge and protection 
circuitry for single-cell packs. 

The circuitry precisely meas- 
ures current, accumulated cur- 
rent, voltage, and temperature, 
and it runs your cell-phone 
manufacturers' proprietary fuel- 
gauge algorithms on its inter- 
nal 16-bit MAXQ microcon- 
troller. The DS2790 contains 
1 6 kbytes of program memo- 



ry, which includes 8 kbytes of 
password-protected EEP- 
ROM and 8 kbytes of ROM; 
128 bytes of data EE PROM 
for storing data such as 
charge parameters, cell char- 
acteristics, and manufacturing 
data; and 512 bytes of data 
RAM. The ROM contains rou- 
tines that allow reprogram- 
ming over the l 2 C interface, 
SHA (Secure Hash Algo- 
rithm)-! authentication, and 
support for in-circuit debug- 
ging. Rush claims that hack- 
ers can too easily break sim- 
pler authentication codes, so 
equipment vendors need the 
complexity of SHA-1. The 
product is available in 28-pin 
TSSOP and TDFN packages 
with prices starting at $2.50 
(1 000).-by Margery Conner 
Maxim, www.maxim-ic.com. 



m FROM THE VAULT 
"The development of sophisticated de- 
sign techniques and relatively standard 
manufacturing processes will permit 
fabrication of relatively small quantities 
of truly custom designs (ICs) at attrac- 
tive costs. During the 1970s, a major 
shift to custom designs will occur, ne- 
cessitating a substantial change in 
vendor-supplier relationships." 

Jack Kilby, assistant vice president and manager of the cus- 
tomer-requirements center at Texas Instruments' Components 
Group, EDN, Jan 1, 1970 



DILBERT By Scott Adams 



THE FAILURE OF IAY 
PROJECT CAN ONLY BE 
BLAtAED ON. . . 





22 EDN | JULY 20, 2006 



PC/104 Modules: 
Stackable, 
Small, and 
Rugged 



Begin your next design with 
WinSystems' PC/104 and 
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compact, 90mm x 96mm 
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WinSystems' products include: 

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• 10/100/1000Mbps Ethernet 

• Modem 

► Enclosures 

► Long-life product availability 

► -40°C to +85°C operation 

► Quick Start SBC Developers kits for 
Windows® XP, CE, and Linux 

You'll find our PC/ 104 modules stack-up as 
the perfect fit for industrial, communication, 
transportation, medical, instrumentation, 
and MIL /COTS applications. 




Call 817-274-7553 or 

Visit www.winsystems.com 

Ask about our 30-day 
product evaluation! 



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715 Stadium Drive • Arlington, Texas 76011 
Phone 817-274-7553 • FAX 817-548-1358 
E-mail: info@winsystems.com 




Platinum Vendor J 



6 



ST 



u 



Ise 



SRIO switch for base stations adds 
preprocessing function, algorithms 



The architecture of cellu- 
lar base stations typical- 
ly involves a bank of RF 
front-end cards that sends 
packetized sample data, gener- 
ally through SRIO (serial 
RapidIO) to an ASIC or FPGA. 
The ASIC or FPGA acts as a 
fairly simple switch, routing the 
packets to a waiting bank of 
DSPs and control-plane pro- 
cessors at the direction of the 
control plane. This arrange- 
ment begs for an off-the-shelf 
SRIO switch to form the hub of 
the processing backplane. 
Filling this need, IDT has an- 
nounced a product that adds 
functions to the switch chip. 

The company examined the 
processing tasks that the 
DSP chips and fabric's chip- 
rate hardware were perform- 
ing and found commonly oc- 
curring tasks during the 
transmitting and receiving op- 
eration. Both in-sample data 
manipulation, such as sign ex- 
tension and endian conver- 
sion, and multipacket opera- 
tions, such as multicasting, re- 



ordering of samples, and 
summation across samples, 
occur. Some of these opera- 
tions occur in the high-speed 
chip-rate processing hard- 
ware, and some occur in the 
symbol-rate operations on the 
DSP chips. Because these 
operations are relatively stan- 
dard, remain constant with 
time or context, and occur 
with some frequency, IDT 
moved them from the chip- 
and symbol-rate hardware 
into dedicated hardware in- 
side the switch chip. 

According to IDT Senior 
Product Manager Bill Beane, 
when you present this sce- 
nario to the base-station de- 
sign team, the hardware engi- 
neers typically want to know 
the resulting aggregate data 
rate. The software-team lead- 
ers, however, want to know 
about the offload capability. 
Anything routine that they can 
move from DSP code means 
more code space and more 
execution time for the more 
complex operations. 



As a result, IDT announced 
an SRIO switch chip. The chip 
supports 40 SRIO lanes at 
speeds as high as 3.1 25 Gbps 
each. You can group the lanes 
in clusters of four, and you can 
configure the drivers to sup- 
port either chip-to-chip or 
backplane-SRIO interconnec- 
tions. The chip also supports 
SRIO-standard priority and 
queuing algorithms to man- 
age data flow in what can be- 
come complex multichip con- 
versations. The chip also sup- 
ports the standard's error- 
management and -mainte- 
nance functions. 

The competing needs for 
performance, small die, and 
manageable power dictated a 
mesh configuration for the 
switch fabric. Power depends 
on the usage scenario. Beane 
says that much of the design 
effort went into modeling 
processing topologies and al- 
gorithms and examining the 
data flow and power con- 
sumption for each. The of- 
floaded processing tasks oc- 



cur in a block that is parallel 
to the switch fabric, between 
banks of input and output ar- 
biters. The block comprises 
10 identical register-pro- 
grammed state machines; in- 
put and output buffers sur- 
round these machines. Each 
state machine can perform 
in-sample, multisample, and 
summing operations, and all 
10 machines can operate in 
parallel. 

The result is a repartitioning 
of the tasks in a typical base- 
station-processing system. 
This task is neither trivial in it- 
self, nor trivial in its implica- 
tions for the packet-process- 
ing software team. Con- 
sequently, IDT this month will 
provide an Advanced Mez- 
zanine Card-profile reference 
design that will include a full, 
production-capable evaluation 
board with four Texas Instru- 
ments (www.ti.com) Himalaya 
DSPs and a latency-accurate 
simulator. The IDT 70K2000Z 
is available for sampling now, 
and production will begin in 
November. Price is approxi- 
mately $ 1 25 ( 1 0,000). 

—by Ron Wilson 

IDT, www.idt.com. 



PREPROCESSING 
SWITCH 



40 RIO LANES 
1.25, 2.5, OR 
3.125 GBPS 





PORTS 
(PACKET 
TERMIN- 
ATION) 




* 









INPUT-PACKET 
BUFFER 



WITHIN-PACKET 
MANIPULATION 



WITHIN-SAMPLE 
MANIPULATION 



OUTPUT-PACKET 
BUFFER 



( PPSC(ONEOF 10) 



PPSCCTWOOF 10) ) 



(PPSC (THREE OF 10)) 



MAINTENANCE BLOCK 



ERROR-MANAGEMENT MODULE 



OUTPUT-PORT 
ARBITER 



CONFIGURATION BLOCK 



NOTE: CRP=CHIP-RATE PROCESSING. 



40 RIO LANES 1.25, 2.5, OR 
3.1 25 GBPS, AS MANY AS 22 PORTS 

CRP-TO-DSPAND 
^ DSP-TO-DSP TRAFFIC: LOW 
~ BANDWIDTH/DYNAMIC 

^ RF-CARD-TO-CRP 
TRAFFIC: HIGH 
BANDWIDTH/STATIC 



IDT's intelligent 70K2000Z combines a 40-port SRIO mesh switch with significant offload-processing capability for both chip- and 
symbol-rate tasks. 



24 EDN | JULY 20, 2006 



The FPGA Eye Opener! 





Transmit eye diagram at 6.375 Gbps. For characterization details, see www.altera.com/stratix2gx/characterization. 



The complete transceiver solution with best-in-class signal integrity. 



Stratix® II GX FPGAs offer the industry's most comprehensive 
solution for high-speed serial applications. With significantly 
lower power consumption than competing devices, Stratix II GX 
FPGAs have up to 20 transceivers performing with exceptional 
noise immunity from 622 Mbps to 6.375 Gbps. Designers 
have immediate access to Quartus® II software support and 
an array of intellectual property (IP) cores, system models, 
development boards, and collateral — everything needed to 
complete a design in the shortest amount of time. 

Discover Stratix II GX FPGAs today at www.altera.com. 



• Up to 20 transceivers with dynamic pre-emphasis, 
equalization, and output voltage control 

• Best-in-class signal integrity from 622 Mbps to 6.375 
Gbps with exceptional channel-to-channel noise immunity 

• Low power consumption (140 mW/channel at 3.125 Gbps 
and 240 mW/channel at 6.375 Gbps) while retaining best- 
in-class jitter performance 

• Dedicated circuitry supporting wide range of protocol 
standards across multiple data rates 



MM, 



The Programmable Solutions Company^ 
www.altera.com 



Copyright © 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are 
identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names 
are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, mask work rights, and copyrights. 



p Ise 



©GLOBAL DESIGNER 

Partners drive WiMax 
momentum across Asia 



Since early in the devel- 
opment of the WiMax 
wireless-broadband 
standard, pundits have predict- 
ed a lot of deployment in re- 
gions such as Asia where 
large geographic areas lack a 
wired infrastructure. That sce- 
nario is coming true, and chip 
vendors in North America, 
Europe, and other regions 
continue to partner with sys- 
tem and telecommunications 
OEMs in the target regions. 
Just recently, OEM Tata Elxsi 
in Bangalore, India, signed on 
with Texas Instruments in an 
IEEE 802.1 16e mobile-Wi- 
Max initiative. Meanwhile, UK- 
based picoChip has found an- 
other Chinese partner for its 
WiMax silicon. 

The Tl/Tata Elxsi partner- 
ship intends to provide tele- 
com-equipment vendors with 
an accelerated path to mobile- 
Wi Max-base-station develop- 
ment. Tata Elxsi has developed 



802.1 6e MAC (media-access- 
control)-software IP (intellec- 
tual property) that it will meld 
with Tl's TMS320TCI6482 
DSPs. The companies based 
the reference design on Mer- 
cury Computer's MTI-203 
AMC (Advanced Mezzanine 
Card), and end systems will 
likely rely on the ATCA (Ad- 
vanced Telecom Computing 
Architecture) standard for 
building modular communica- 
tion systems. The partnership 
is key because Tata Elxsi of- 
fers both the wireless-domain 
experience in technologies 
such as the MAC and the sys- 
tem-design experience, along 
with relationships with target 
equipment vendors. 

Meanwhile, picoChip con- 
tinues to push its programma- 
ble-silicon architecture into all 
WiMax flavors. The latest part- 
nership is with Chinese tele- 
com OEM China GrenTech. 
The company brings signifi- 



Ceramic substrate enables 
distributed processing in vehicles 

The automobile has evolved to depend on a com- 
plex distribution of computational resources in 
subsystems ranging from brakes to safety to en- 
gine control. But distributing processor- based sub- 
systems into environmentally challenging loca- 
tions within a vehicle remains a problem. Japan- 
based Kyocera has just demonstrated an ECU (en- 
gine-control unit), which it deployed directly in an 
automatic transmission from Aisin AW Co. 
Locating the ECU on the high-torque, six-speed 
transmission exposes the subsystem to harsh tem- 
peratures and vibration. Kyocera developed a mul- 
tilayer-ceramic substrate that could both handle 
the harsh environment and deliver on the reliability 
and small footprint that automakers need. Kyocera 
recently demonstrated the ECU at the Automotive 
Engineering Exposition 2006 in Yokohama, Japan. 

-by Maury Wright 

Aisin AW Co, www.aisin-aw.co.jp. 
Kyocera, www.kyocera.com. 



cant RF- and power-amplifier 
experience, along with manu- 
facturing capability, to the 
partnership. China GrenTech 
has been a player in the 3G- 
cellular market, and the pico- 
Chip partnership will allow 
quick entry into the WiMax 
market. 

—by Maury Wright 



China GrenTech, 

www.powercn.com. 
Mercury Computer, 

www.mc.com. 

picoChip, 
www.picochip.com. 

Tata Elxsi, 
www.tataelxsi.com. 

Texas Instruments, 
www.ti.com/wimaxwi. 




FOR HOT SPOTS 

WiMax will serve as an alternative to T1 for businesses, as an alternative to DSL for cable and consumers, and as a back-haul option 
for cellular base stations and hot spots. 



26 EDN | JULY 20, 2006 



Blackfin is at 32°54.6 N, 96°45.1 W 




Image Processing 
VoIP 

Embedded Security 
GSM/EDGE 
Baseband Processing 
Digital Radio 
► Global Positioning 
Packet Processing 
GCC/Linux 
Cryptography 
Rights Management 
Open Source 
Car Telematics 
IPTV 

Mobile TV 
Telepresence 
Biometrics 
Driver Assistance 
Streaming Media 



► Maxtrack MTC-600 Vehicle 
Tracking System 



Next stop: GPS tracking, networked control 

To create its compact, low cost tracking system capable of managing an 
entire bus fleet or coast-to-coast trucking operation, Maxtrack put 
Blackfin® in the driver's seat. With 32-bit, 500 MHz performance at 85°C 
and integrated CAN® controller, Blackfin enables simultaneous processing 
of complex GPS, GSM/GPRS, audio, and spread spectrum transceiver 
algorithms, plus networked camera functionality. Blackfin also serves as 
the central processing unit for all data-driven needs. Now Blackfin is 
everywhere, on schedule. 



Get started using Blackfin now: 
analog.com/blackfin-is-everywhere 



ANALOG 
DEVICES 



2006 Analog Devices, Inc. 



p Ise 



RESEARCH UPDATE 



BY MATTHEW MILLER 




Researchers prepare to test the condition of a wiring bundle in 
the cockpit of a retired Boeing 737. 

Sparks could prevent 
airline crashes 



Airline-maintenance 
crews, not to mention 
passengers, face a 
frightening prospect: Some- 
where within the miles of 
wiring inside a commercial 
airplane, a minuscule physical 
fault, such as a bit of worn in- 
sulation, can cause a cata- 
strophic short circuit. For ex- 
ample, investigators fingered 
faulty wiring as the cause of 
a fire that led to the crash in 
1998 of Swissair Flight 111, 
which killed 229 people 
when it went down off Nova 
Scotia. 

Now, researchers at Sandia 
National Laboratories have 
announced a technology that 
could make it easier for air- 
lines to locate and repair 
such faults. The suitcase- 
sized PASD (pulsed-arrest 



ed-spark-discharge) system 
uses high voltage to propel a 
nanosecond-long pulse of 
electricity through as many 
as 40 wires at a time. Due to 
the high voltage, the pulse 
readily jumps from any gap in 
faulty insulation to the air- 
craft bulkhead or another 
faulty wire nearby, causing a 
spark. The pulse is so short 
that it cannot do any damage, 
and the system measures 
current-return time to pin- 
point faults to within inches. 

Astronics Advanced Elec- 
tronic Systems (www.astronic 
saes.com) has licensed the 
technology and plans to offer 
it commercially starting in 
September. 

Sandia National Lab- 
oratories, www.sandia.gov. 



Researchers listen 

to the sounds of CMOS 

Scientists at NIST (National Institute of Standards and 
Technology), working with IBM and RF Micro Devices, have de- 
veloped methods to reliably measure the faint thermal noise gen- 
erated by the random motion of electrons in CMOS transistors. 
Characterizing this noise allows engineers to better tune sys- 
tems, such as cellular phones, for optimal signal range, data rate, 
and battery life, according to NIST. The methods involve meas- 
uring the noise on the wafer before cutting and packaging. 

The group also detailed its ability to perform "reverse" noise 
measurements, which focus on the noise that transistor inputs 
emit when they reflect and scatter incoming signals. This infor- 
mation can help engineers discover the impedance properties 
that will best minimize noise, according to NIST. 

National Institute of Standards and Technology, 
www.nist.gov. 

IBM, www.ibm.com. 

RF Micro Devices, www.rfmd.com. 



Molecular electronics gel in ajar 

Researchers from Philips Research and the Univer- 
sity of Groningen (Groningen, Netherlands) have 
developed a molecular self-assembly process that 
reliably produces arrays of 1.5-nm-thick molecular 
diodes on standard substrates. Previous attempts 
to build such structures, which feature a single lay- 
er of molecules sandwiched between gold elec- 
trodes, have suffered from shorting. In this 
process, an additional plastic electrode layer pre- 
vents shorts. 

Not a week goes by these days without some re- 
search outfit touting an advance in self-assem- 
bling, nanoscale circuitry. The Philips/Groningen 
team, however, claims that its work stands out be- 
cause it will allow reliable, reproducible measure- 
ments of molecular junctions-an essential step in 
studying the potential applications of such circuits. 

Philips Research, www.research.philips.com. 

University of Groningen, www.rug.nl. 




28 EDN | JULY 20, 2006 



Blackfin is spinning 





Suci!fk>. 



Biometrics 
Driver Assistance 
Streaming Media 
High Definition 
Triple Play 
Image Processing 
► Effects Processing 
VoIP 

Embedded Security 
GSM/EDGE 
Baseband Processing 
Digital Radio 
Global Positioning 
Packet Processing 
GCC/Linux 
Cryptography 
Rights Management 
Open Source 
Car Telematics 



Scratch vinyl goes digital 

Professional DJs gave Denon a special request: "We want to play MP3s 
with all the features of our vinyl rigs, including scratch, reverse, brake, 
filter, and flanger." But enabling these user control needs, coupled with 
near-zero latency of audio encoding and decoding, required a unique 32-bit 
processor. So Denon cued up Blackfin®. With 800 MMACS performance at 
$5 cost, Blackfin scratched the competition. Now Blackfin is everywhere, 
bringing the beats. 



Get started using Blackfin now: 
analog.com/blackfin-is-everywhere 



ANALOG 
DEVICES 



2006 Analog Devices, Inc. 



MILESTONES 



THAT MATTERED 



MAURY WRIGHT • EDITOR IN CHIEF 



Painting microprocessors 
in broad strokes 

No one likely would argue the microprocessor's place on 
our roster of Milestones That Mattered. Surely, there'd 
be heated discussion over who invented the processor. 
But the benefits of the invention are clear. Productivity 
has benefited hugely from the processor-based PC. And 
thousands of processors surround us in our everyday 
lives, with vendors adding more daily. 

One of the themes of our 50th UARTs, to complex data-coding funo 




anniversary issue, due this September, 
will be "softwarerization." We know it's 
not a word. But the movement of func- 
tions to software has been an unmis- 
takable and enduring trend, which the 
microprocessor, at least in the broadest 
set of applications, has enabled. 
Designers can implement anything from 
simple hardware circuits, such as 



tions, such as MPEG, in software. 

But let's get back to history. Intel 
claims to have developed the first com- 
mercial microprocessor with the 
launch of the 4004 in 1971. The com- 
pany built the first design for customer 
Busicom of Japan and targeted calcula- 
tors, although Intel later reacquired the 
rights to the 4004. Ted Hoff and 



Federico Faggin of Intel get the credit, 
although Intel tried at one point to erase 
Faggin's contribution from history after 
he defected to Zilog. 

Some historians, however, believe 
that Four Phase Systems was shipping 
the AL1 processor a year before Intel 
delivered the 4004. Lee Boysel designed 
the AL1, but history largely buried the 
achievement because Motorola ac- 
quired the company, which most people 
forgot about. Texas Instruments also lays 
claim to early processor development. 

What's undeniable is that Intel was 
most successful in commercializing the 
technology that would underwrite 
decades of innovation. You can read the 
complete original EDN account of the 
4004 with the online version of this arti- 
cle at www.edn.com/060720mtm. That 
early processor sold for $ 100 in low vol- 
umes.EDN 



"Announcing a new era of integrated electronics." 



This introduction for a new IC may seem immodest, but 
Intel Corp. might just be correct. The IC is a single-chip 
CPU designed for low-speed microprogrammable applica- 
tions, such as terminals, peripherals, test systems, and 
process control. The one-chip CPU was described at the 
EDN/EEE seminars in August. 

The CPU, Type 4004, is designed to work with other 
members of Intel's MC5-4 microcomputer set. The other 
ICs in this kit of standard building blocks are the 4001 
ROM, 4002 RAM, and the 4003 shift register (SR). 

The minimum system configuration consists of one 
CPU an one 256 X 8-bit ROM. For one-of-a-kind applica- 
tions, an electrically programmable ROM can be used in 
place of the mask-programmable 4001. The MCS-4 micro- 
computer is fabricated with silicon-gate, low-threshold 
MOS technology. 

Packaged in a 16-pin ceramic DIP, the CPU chip con- 
sists of a 4-bit adder, a 64-bit (16X4) index register, a 48- 
bit (4X12) program counter and stack, an address incre- 
menter, an 8-bit instruction register and decoder, and con- 
trol logic. Forty-five instructions are included in the 
4004 's repertoire. All timing, control, and arithmetic oper- 
ations are implemented internally. 

Information flows between the 4004 and the other 
chips through a four-line data bus. A system built with the 
MCS-4 set can have up to 4k X 8-bit ROM words, 
1 280 X 4-bit RAM characters, and 128 I/O lines without 
requiring any interface logic. With the use of external 




gates, the computer size can be increased even 
further. The MCS-4 uses a 10.8-|JLsec instruction 
cycle. The basic instruction execution requires eight or 16 
cycles of a 750-kHz clock. Addition of two 8-digit num- 
bers requires 850 |JLsec. 

Custom systems using this 4004 chip are implemented 
by microprograms stored in a ROM. The idea of micropro- 
gramming a process to implement a special controller is not 
new. IBM's system 360 computer and HP's 2 100 A desk cal- 
culator are two examples of both large and small systems 
that have exploited the inherent design and production ad- 
vantages of microprogramming. In desktop calculators, 
about 35% of the logic is associated with doing arithmetic. 
The other tasks are keyboard encoding, printing results, dis- 
playing status and general control. These functions can be 
done by microprogramming rather than by additional ran- 
dom logic. Microprogramming can even be used for key- 
board switch debouncing and for converting 4-bit BCD code 
to seven-segment lamp code. Many features may be added to 
systems using this chip by providing additional ROMs. 

This approach provides a flexible and modular tech- 
nique for system design in which memory devices are used 
instead of logic devices. The major limitation to its applica- 
tion is speed. While an IC logic can make a decision in 
about 5 nsec, and combinatorial networks allow many 
decisions to take place in parallel, this computer chip per- 
forms decisions sequentially at 10.8 |xsec per instruction. 

—EDN, Jan 15, 1972 



30 EDN | JULY 20, 2006 



Support Across The Board. 




Bringing Products to Life. 

At Avnet Electronics Marketing (EM), support across 
the board is much more than a tagline for us. From 
initial design through end of life — we are deeply 
committed to driving maximum efficiency throughout 
the product lifecycle. Take a current design success 
story involving Paragon Innovations, Inc., for example. 

Paragon / B. Braun - The Challenge 

The processor used in Paragon OEM customer and 
medical device maker B. Braun Medical's product 
was about to be obsolete; with demand still strong, 
Paragon needed to replace the main processor while 
minimizing changes to the circuit board. This revision 
would need to be made quickly: B. Braun's supply of 
processors was rapidly dwindling and, at the same 
time, the FDA would need to review and approve any 
new design to the product. These were heart stopping 
challenges confronting Paragon. Enter Avnet. 

Avnet EM and Atmel - The Solution 

Avnet and Atmel Corporation engineers studied the 
B. Braun board, in search of the right ARM solution 
to replace the obsolete microcontroller, while seeking 
opportunities to help Paragon improve overall 
performance, efficiency and cost-effectiveness on 
the project. On the technical side, Atmel came through 
with their feature rich ARM9 Smart Microcontroller. 
Avnet then supported the program on the supply chain 
side, keeping Paragon informed on the latest pipeline 
issues as it readied for production. During the entire 
process, neither Avnet nor Atmel missed a beat, and it 
really paid off for Paragon. 

For additional application solutions 
and to download the case study, visit: 
www.em.avnet.com/atmel/satb 



iiimEi 



Everywhere You Are* 




AVNET 

electronics marketing 



Enabling success from the center of technology " 




Avnet Green Initiative 



ARMi 



1 800 408 8353 
www.em.avnet.com 

5) Avnet, Inc. 2006. All rights reserved. AVNET is a registered trademark of Avnet, Inc.© Atmel Corporation 2006. 

All rights reserved. Atmel®, logo and combinations thereof, and others, are the registered 
trademarks, and others are the trademarks of Atmel Corporation or its subsidiaries. 





ANALOG DOMAIN 



BY JOSHUA ISRAELSOHN, CONTRIBUTING TECHNICAL EDITOR 



of the unity-gain frequency, F Q , to the 
dc gain, A Q , follows from the transcon- 
ductance and gate capacitance: 

BAN DWIDTH = — = ^ . 

A 2tiA C gaxe 

In certain applications, meeting the 
application's bandwidth requirements is 
not insufficient; designs must prevent 
slew-rate limiting, which can impose 
another requirement on the minimum 
current: 

I SR =27lFq T r T Vq T nC 



Scaling: a balanced view, 
part three 

n the last installment of Analog Domain, the application's match 
ing, noise, and 1/f noise requirements determined the model mini 
mum circuit's load capacitance, C MIN — a representation of the fol 
lowing stage's input impedance. Matching varies in inverse propor 
tion to 1/L MIN ; noise and 1/f noise follow an inverse -square -law rela 
tionship with the minimum length (references 1 and 2). 

For example, for applications in 
which matching constrains the dynam- 



SIG V SIG^L- 



ic range, such as track-and-hold ampli- 
fiers and several ADC architectures, you 
can express the offset voltage, V QS , as 

_ n qY T OX 



OS : 



Here, n is the number of sigmas that 
your company's yield model requires, 7 
is a process-dependent parameter, T QX 
is the gate-oxide thickness, and W and 
L are the device width and length. 

The gate capacitance, C GATE , of the 
transistors that must meet the match- 
ing requirements is 



C, 



GATE - " 



, £q£rWL 



T, 



cellation, that reduce the requirements 
for individual devices. 

In applications for which white noise 
limits the dynamic range, including a 
broad class of small-signal amplifiers, 
converters, and filters, 

v NOISE -7; > 
^NOISE 

though recent efforts suggest methods 
that beat this traditional floor. Express- 
ing this limit as a minimum capacitance, 
with dynamic range as a parameter, yields 

C NOISE=kT- 



DR 



SIG(RMS) 



OX 



where e Q is the permittivity of free space 
and e R is the relative permittivity of the 
gate oxide. Combining these two equa- 
tions gives the C MIN of the transistors 
that satisfies the matching requirements: 

>2 



c. 



'GATE^O^R 



£ o £ r4y 2t ( 



DR 



V SIG(RMS) 



where DR is the application's matching- 
limited dynamic-range requirement. 
Due to the strong influence that match- 
ing requirements have on C M1N and, as 
a result, dissipation, circuits that 
demand tight matching between large 
numbers of transistors often make use 
of circuit techniques, such as offset can- 



After determining the load capaci- 
tance necessary to meet dynamic-range 
requirements, the next step is to cal- 
culate the current necessary to suffi- 
ciently drive this capacitance to meet 
the application's ac specifications — 
bandwidth, settling time, slew rate, and 
total harmonic distortion. 

Fundamental to these measures is the 
MOSFET's transconductance, gm: 

2I D 



gm= 



GT 



where V C =V CS — V T in strong inver- 



and 



2nkT 



GT" 



in weak inversion. Bandwidth, the ratio 



I- 



Similar equations describe the mini- 
mum current necessary to attain spe- 
cific second- and third-harmonic-dis- 
tortion levels with and without feed- 
back. For these, refer to Reference 2. 

As was the case with the voltage effi- 
ciency, the model requires an assump- 
tion of current efficiency, r\ c . Given a 
differential-signal path — a practical 
departure from the single-transistor 
string under discussion thus far — and 
modest current scaling in the bias-cur- 
rent mirror, an r\ of one-third is a good, 
if somewhat conservative, starting as- 
sumption for current efficiency of a sin- 
gle stage. In practice, common circuit- 
design practices more efficiently dis- 
tribute bias currents, but the precise 
number depends upon both bias-gener- 
ator and signal-path-circuit topologies. 

The sum of string currents — or, in the 
case of differential circuits, the half-cir- 
cuit currents — multiplied by the current 
efficiency yields the supply current, I DD . 
The product of supply current and sup- 
ply voltage, which you calculated from 
the application's signal-swing require- 
ments, results in the minimum power 
dissipation necessary to attain the orig- 
inally stated parametric goals. EDN 

REFERENCES 

References are available at www.edn. 
com/060720ji. 

Joshua Israelsohn is director, technical 
information at International Rectifier 
Corp. You can reach him at edn- 
joshua@mindspring. com. 



EDN I JULY 20, 2006 




It's the 8-bit 
entry point into a 
whole new world 
of opportunity. 



Welcome to the Controller Continuum 

i i 

8-bit solutions from Freescale lead you into the Controller Continuum: our roadmap 
for 8-bit and 32-bit compatibility. This major expansion of our 8-bit portfolio— from 
1K Flash to 128K Flash and from 6 pins to 122 pins— delivers not only unprecedented 
choice and value, but the ability to scale in all directions from the 
low to high end. But we're not stopping there. With the Controller 
Continuum, we'll be rolling out pin-for-pin compatible devices. You 
can upgrade 8-bit designs to 32-bit performance and share the same 
set of peripherals and tools, such as the now easier-to-use Fast Track 
services for the CodeWarrior® tool suite. Now the applications you 
develop will not only be smarter, how you develop them will be too. 





freescale 

For more go to freescale.com/8bit semiconductor 



Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. ® Freescale Semiconductor, Inc. 2006. 




SIGNAL INTEGRITY 




BY HOWARD JOHNSON, PhD 



Reference-free pair 



A correspondent from Capstone Visual needs to carry 
some high-speed network traces across his two-layer pc 
board. The board consists of 62-mil-thick FR-4 materi- 
al. No solid plane layer exists anywhere on this board. 
To manage skew between the two traces, my corre- 
spondent routed them exactly on top of one another — 
one on the top layer and one on the bottom. He needs a way to calcu- 
late the trace width necessary to make a good 100H differential config- 
uration using this geometry. 

Before I address this issue, I should 
congratulate my correspondent for rec- 
ognizing that any trace configuration 
with a uniform cross section makes a 
perfectly good transmission line. You 
can use one trace with a solid reference 
plane, two traces side by side, two traces 
above and below one another, or four 
traces in a quad configuration; the pos- 
sibilities are endless. Just keep the 
geometry consistent, and then all that 
matters are the impedance, delay, 
attenuation, and crosstalk. 

My correspondent's traces are short 
compared with the extent of his net- 
work connection, so the trace delay and 
trace loss are immaterial. 

Regarding the differential imped- 



POSITIVE VOLTAGE 



ZERO VOLTAGE 




NEGATIVE VOLTAGE 



Figure 1 A zero-voltage plane bisects 
every symmetric differential configura- 
tion. 



To calculate the 
impedance of an 
above-and-below 
differential-pc- 
board -trace setup 
with no reference 
plane, just lie to 
your 2-D field 
solver. 

ance, you can use an "image-plane" 
method to calculate the impedance of 
that configuration. 

Figure 1 shows a cross- sectional view 
of two round conductors, assuming an 
air dielectric. (The conductors need 
not be round; any shape gives the same 
type of picture.) The electric-field pat- 
terns in the region surrounding the 
traces emanate from each trace per- 
pendicular to its surface. A lot of lines 
flow directly from the positive trace to 
the negative trace. The lines bulge on 
either side. Voltages at the top of the 
drawing are positive, and voltages at 



the bottom are negative. Everywhere 
along a line drawn through the middle 
they are exactly OV. 

The dotted, green horizontal line 
bisecting the diagram represents an 
imaginary plane, or image plane, sepa- 
rating the two conductors. "Symmetry" 
in this case means that, if the differen- 
tial pair is properly balanced, the volt- 
age everywhere on the image plane 
remains zero at all times. Therefore, 
concerning the differential mode of 
propagation, no circuit can distinguish 
between, first, the original unrefer- 
enced configuration and, second, the 
same configuration with a real, physi- 
cal, OV reference plane added in the 
middle. 

To calculate the impedance of an 
above-and-below differential-pc-board- 
trace setup with no reference plane, just 
lie to your 2-D field solver. Tell it that 
there is a solid reference plane dead 
center in the middle of the stackup. 
Separately compute the impedance 
from the top trace to the plane (a nor- 
mal micros trip arrangement) and dou- 
ble that number to get the complete 
differential impedance. 

The image-plane method makes 
quick work of the impedance calcula- 
tion, but what about crosstalk? Lacking 
a solid reference plane, my correspon- 
dent's traces will be particularly sensi- 
tive to crosstalk from nearby sources. 
His circuit may not function for 
crosstalk reasons, but at least it won't 
suffer reflections !edn 



UTEDN.COM 



EE Go to www.edn.com/060720hj and 
click on Feedback Loop to post a 
comment on this column. 



Howard Johnson, PhD, of Signal Con- 
sulting, frequently conducts technical 
workshops for digital engineers at Oxford 
University and other sites worldwide. Visit 
his Web site at www.sigcon.com or e-mail 
him at howie03@sigcon.com. 



34 EDN | JULY 20, 2006 




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TALES FROM THE CUBE 



PETER HISCOCKS • SYSCOMP ELECTRONIC DESIGN LTD 



Sweating blood over 
hardware-interface routines 




n the 1980s, I obtained a number of consulting contracts 
to put the Vinten aerial photo camera and various other 
sensing devices into fixed-wing and helicopter aircraft. 
Along the way, I developed a computer-control system for 
the cameras that would adjust the trigger interval to 
obtain the desired overlap from frame to frame. It used a 
Commodore 64 with modified video-overlay circuitry. 

One of these jobs was for a government agency in Edmon- 
ton, AB, Canada. There was a lot to do. The cameras and sen- 
sors went into a pod on the bottom of a Jet-Ranger helicopter. 

A rack of control equipment mounted interface between the computer and 



on seat rails in the cockpit- The entire 
system was dual-powered from 1 17V-ac 
or large gel-cell batteries. 

The system came together in the 
workshop just days before we were due 
to ship it- All the subsystems worked 
correctly, so we moved on to operating 
the complete system. It ran flawlessly 
for an hour or so, the cameras trigger- 
ing correctly every few seconds- Then, 
in one of those heart-stopping mo- 
ments that every engineer has experi- 
enced, an anomaly: The cameras fired 
off a burst of frames at high speed and 
then returned to the original interval. 

The Vinten camera draws 20 A for 
a few milliseconds every time it starts, 
so it's a major source of electrical noise. 
I had carefully designed the electronic 



the cameras to minimize the effect but, 
I thought, maybe not carefully enough. 
The computer interface was an input/ 
output shift-register pair attached to the 
parallel port. The shift-register parallel 
connections drove the camera relays, 
read back the radar altimeter, recorded 
video ground speed, and controlled 
other devices. I spent days peering into 
my scope, looking for noise spikes. 
Nothing showed. I installed various 
noise-control circuits, but the problem 
recurred at random. 

Delivery was now late. The client 
insisted that the hardware appear in 
Edmonton. Reluctantly, I advised 
him of the problem — promising that 
I'd find it eventually — and shipped 
everything off. A week passed, and I 



still had no idea where to look. 

The time came to fly to Edmonton. 
I packed every diagnostic tool I owned 
and headed out to the airport for a 
morning flight. Then, as we were 
watching the in-flight movie — Back to 
the Future — it came to me. 

In Edmonton, the client was not 
happy. I sat down with the equipment, 
typed in two lines of assembly code, and 
held my breath. The system operated 
perfectly. 

The problem: Two software routines 
were accessing the interface hardware. 
One routine, to read the ground speed, 
was part of the main loop. Another rou- 
tine accessed the interface as part of the 
60-Hz timing interrupt. Normally, 
these routines didn't get in each other's 
way. However, if the main-loop routine 
was reading the ground speed when a 
60-Hz interrupt occurred, it would 
resume with corrupted ground-speed 
data, which then misadjusted the cam- 
era interval. The solution: Two in- 
structions to disable the 60-Hz inter- 
rupt while reading ground speed. 

This experience taught me that it's 
asking for trouble to access hardware 
from more than one point in the pro- 
gram. There should be a single interface 
routine that controls access to the hard- 
ware. Furthermore, it's important to 
realize that any section of the code can 
be interrupted and may corrupt the sys- 
tem state. To prevent this situation, you 
need to disable and enable interrupts or 
save additional state as part of the inter- 
rupt-service routine. This type of 
problem is nasty to debug, because it 
occurs at random intervals. So, you 
must properly engineer the system. 

Testing and test equipment don't 
always help. As the saying goes, some- 
times you have to think about it until 
little drops of blood appear on your 
forehead; then, it will come to you.EDN 

REFERENCE 

CI Hall, RJ, P Hiscocks, "A Microcom- 
puter-Based Camera Control System," 
Photogrammetric Engineering and Remote 
Sensing, Volume 56, No. 5, April 1990, 
pg 443. 



36 EDN | JULY 20, 2006 



SYNCHRONOUS RECTIFICATION: 
NO HEATSINK, ONLY 6 COMPONENTS 



New SmartRectifier™ IC Reduces Part Count by 75% and Boosts System Efficiency by 7 % 



o- 



— |»D 




Adjustable 
threshold 
setting 



Micro-power consumption 
for 1W standby 



Powerful 7A gate 
drives standard- and 
logic-level MOSFETS 




Vcc 


Vgate 


OVT 


GND 


MOT 


v D 


EN 


v s 



i IR1167 




Direct connection 
to 200V MOSFETS 



Adaptor Redesign Example: 

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Specifications 



Part Number 


Package 


v CC 

(V) 


v F et 

(V) 


Sw. Freq. Gate Drive 
Max. (kHz) +/- (A) 


V GATE Sleep Current 
Clamp (V) Max.(|jA) 


IR1167A/S 


DIP-8/S0-I 


\ 20 


<=200 


500 +2/-7 


10.7 


200 


IR1167B/S 


DIP-8/S0-I 


I 20 


<=200 


500 +2/-7 


14.5 


200 


MOSFETS to use with the IR1167 SmartRectifier as a total chipset solution: 


Part Number 




V DSS 

(V) 




R DS(on) max® 10V 

(mQ| 






IRFB4110 




100 




4.5 




TO-220 


IRF7853 




100 




18 




SO-8 


IRFB4227 




200 




24 




TO-220 



Design Tools 

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on IR's myPower™ site (http://www.irf.com/design-center/mypower/). 

myPower™and SmartRectifiefare trademarks of International Rectifier Corporation. 



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THE POWER MANAGEMENT LEADER 





BEYOND ROHS: 

THE GREENING OF 

GLOBAL MARKETS 



BY MARGERY CONNER • TECHNICAL EDITOR 

US AND ASIAN GOVERNMENTS ARE ABOUT TO IMPOSE 
THEIR OWN VERSIONS OF THE EU'S ROHS DIRECTIVE. 
RATHER THAN TARGETING EACH REGION'S REGULA- 
TIONS, MANUFACTURERS MAY STANDARDIZE ON THE 
MOST STRINGENT "GREEN" DIRECTIVE. THIS MOVE WILL 
AFFECT EVEN PRODUCTS THAT ARE EXEMPT FROM REG- 
ULATION, AS COMPONENT MANUFACTURERS MOVE 
AWAY FROM NONCOMPLIANT PARTS. 

For the past three years, the electronics industry has 
been eyeing this month as the time that the European 
Union's ROHS (reduction-of-hazardous-substances) 
directive was supposed to take effect for some elec- 
tronic products. Barring any last-minute legal maneu- 
vers or postponements, electronic products bound for 
the multibillion-dollar European consumer market will need to 
satisfy the directive's limitations on six hazardous materials: lead, 
mercury, cadmium, hexavalent chromium, polybrominated 
biphenyls, and polybrominated biphenyl ethers (Reference 1). 
The directive mandates that electronic products that do not com- 
ply with the directive's restrictions, calling for the elimination of 
these six substances, will face removal from the market and their 
manufacturers will have to pay fines. 



Predictions of what will happen this 
month in Europe as the deadline passes 
run the gamut from business as usual with 
a smooth transition to a brave, new, lead- 
free world to major lawsuits halting the 
imposition of the directive. Some sce- 
narios even predict a nightmare for Euro- 
pean officials as they attempt to establish 
documentation requirements and enforce 
them on the fly. Regardless of the short- 
term outcome, the world of electronics 
will never go back to its "pregreen" state; 
rather, EU ROHS is just the first of many 
government- imposed regulations of 
environmental substances. 

China passed its own version of ROHS 
in February, with an effective date of 
March 1, 2007 (Reference 2). The law 
specifies the same six substances as the 
European ROHS and then throws in a 
wild card: "other toxic or hazard sub- 
stances or elements set by the State." 
China may not only regulate more sub- 
stances but also allow a different amount 
of those substances. "'Lead-free' in the EU 
ROHS means it has less than 1000 ppm 
of lead in it," says Greg Roberts, market- 
ing vice president of EMA, a value-added 
reseller of Cadence software. "Other 
countries selling products into China will 



38 EDN | JULY 20, 2006 



Embedded Networking? 

Micrel Has Your Processor Covered 



Micrel's KSZ88xx Series Gives Designers One-Stop 
Shopping For All Networking Interface Needs 



8, T6 or 32 Brf Gerrerrc Efu/Trrferfaee 



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has you covered. Whether you need networking via an 8, 1 6 or 
32-bit generic-bus, PCI-bus, Mil, RMII, or SNI host interfaces, 
Micrel has the answer in easy to install single and dual-port 
Ethernet solutions. The devices address the growing need for 
streamlined networking connectivity in IP-Set Top Boxes, VoIP 
phones, Network Printers, Industrial Controls and networked 
Game Console applications, to name but a few. The dual port 
devices have the lowest latency (sub 310nS) in the industry and 
are ideal for daisy-chaining applications, or simply as two port 
switches to connect to voice, video and data. 

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cables. In addition, Micrel's LinkMD™ cable diagnostics function not 
only determines the length of the cable and the distance to fault, 
but also diagnoses common cabling faults such as open and short 
circuits. These features reduce the need for costly customer calls and 
IT service requests. Along with Micrel's trademark high reliability, 
outstanding performance, and low power consumption, the KSZ88xx 
family offers ideal solutions for applications that require compact, 
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For more information, contact your local Micrel sales representative 

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© 2006 Micrel, Inc. All rights reserved. Micrel is a registered trademark and LinkMD is a 
trademark of Micrel, Inc. 




AT A GLANCE 

El Expect China, Korea, Australia, 
and California to be among the first 
to implement "green" regulations. 



El It's shortsighted to implement a 
documentation system that tracks 
only yes/no compliance for the 
European Union's ROHS (reduction- 
of-hazardous-substances) regulation. 



EI Ensure that your system can 
adapt to an increasingly regulated 
industry. 



EI Long leadtimes, higher prices, 
and accelerated end-of-life cycles 
will affect even manufacturers eligi- 
ble for exemptions for lead parts as 
component manufacturers seek to 
standardize on green parts. 

be subject to China's ROHS directive, 
which may have a lower allowable lead 
content. A product that could be lead- 
free or ROHS-compliant for Europe may 
not be compliant in China." (For some 
suggestions on how to make your designs 
globally compliant, see sidebar "Seven 
tips for the brave new world of 'green' 
regulations.") 

The EU has not yet spelled out what 
kind of a documentation system it expects 
or what is sufficient for a manufacturer to 
prove it and its suppliers are in full com- 
pliance. It will determine what consti- 
tutes adequate documentation during 
these early months of the ROHS imple- 
mentation, with companies involved in 
early test cases serving as guinea pigs. 
However, China's ROHS apparently will 
be more hands-on, with companies pos- 
sibly having to prove their compliance 
upfront by undergoing testing at labs in 
China. 

Some manufacturers currently track 
their EU ROHS parts' compliance with 
a simple spreadsheet listing each part and 
a yes/no check box under ROHS com- 
pliance. Is this enough documentation to 
satisfy the EU's directive? "It is until 
somebody challenges you," says EMA's 
Roberts. "The directive says you have 30 
days to compile all the documentation on 
every component in your product line, 
including the traceability of the infor- 
mation. It requires materials declaration 



for everything in your product all the way 
down to the resistors, including the box 
it's in and the labels on it." 

The OEM that the product packing 
lists is liable for compliance for the entire 
system. For example, if you purchase a 
power supply for your design and the 
manufacturer claims that it complies with 
the directive, you as the system manu- 
facturer are still responsible for the lia- 
bility of that entire assembly. "Many com- 
ponent vendors just give you a certificate 
and say 'yes, we're compliant,'" says Keith 
Hopwood, vice president of marketing for 
Phihong USA. "I say, 'show me.'" 

A simple yes/no spreadsheet probably 
will not survive an EU ROHS challenge, 
and it has the additional drawback of 
being unable to adapt as regions impose 
different regulations. A robust system will 
go beyond yes/no EU ROHS compliance 
and track the actual parts-per-million 
count for all environmentally sensitive 
substances. However, it may be difficult 
to achieve that goal in the allotted time 
frame, cautions Eric Larkin, chief tech- 
nology officer for Arena Solutions, a 
provider of Web-based PLM (product- 
life-cycle management). "If you believe 
that you're going to be able to get a full 
substance-level breakdown for every sin- 
gle component on your pc board within 
the 2006 to 2007 time frame, I don't see 
that happening," he says. "We know of 
only four component manufacturers that 
are looking at publishing the detailed sub- 
stance-level breakdown." 

A survey of customers by Toshiba's Dis- 
crete Products Division corroborates 
Larkin's view. "Lack of material content 
information is one of the biggest hurdles 
that many companies are facing right 
now," says Cynthia Pham, senior quality- 
assurance engineer for Toshiba. 



EB Visit www.edn.com/green to see 
ROHS (reduction-of-hazardous-sub- 
stances)-compliance information from 
electronics manufacturers, distributors, 
and consulting organizations. 

ED Go to www.edn.com/060720dfl and 
click on Feedback Loop to post a com- 
ment on this article. 



Despite the well-publicized ROHS 
deadline of July 1, 2006, regional pre- 
paredness varies widely. According to Jim 
Smith, senior vice president of warehouse 
and distribution worldwide at Avnet 
Logistics, EU countries' ROHS readiness 
is well ahead of the Americas', which in 
turn is ahead of the Asian countries. The 
reason that the EU is so far ahead is that 
the directive is the region's own regula- 
tion. Also, although European market 
share might account for only 15% of US 
vendors' market share, it accounts for at 
least half for most European OEMs. A 
more subtle reason is that Europeans have 
seen a well-publicized example of the 
EU's will to enforce environmental reg- 
ulations. In 2001, the Dutch government 
blocked the sales of 1.3 million Sony 
PlayStations in the EU because the sys- 
tems' cables violated an EU environ- 
mental directive limiting the amount of 
cadmium (Reference 3). The incident 
demonstrates that even large, well- 
known brands are subject to the regula- 
tions. Although Sony's supplier provided 
the noncompliant cables, Sony incurred 
the penalties and loss of revenue. 

What can trigger an EU ROHS chal- 
lenge? Companies that have incurred the 
expense and time of complying with EU 
ROHS use their compliance as a com- 
petitive advantage against less green com- 
petitors. They can file a claim, triggering 
an EU audit of another company's system. 
Compliant vendors see this whistle-blow- 
ing as a fair tactic against noncompliant 
competitors. 

Another reason that Asian manufac- 
turers may lag behind in ROHS compli- 
ance is that they are waiting to see what 
China's ROHS initiative comprises. 
China's directive may not be significant- 
ly stricter than the EU ROHS because 
one of China's strengths is its competitive 
market pricing, and the Chinese govern- 
ment may be loath to put that advantage 
at risk. Regardless of China's eventual 
stance, you can expect the industry stan- 
dard to evolve from the regulations of 
those regions with significant markets and 
that impose the strictest regulations. 

Component manufacturers cannot jus- 
tify multiple production lines for parts 
with the same functions. This reluctance 
or inability to make both green and non- 
green versions has important implications 



40 EDN | JULY 20, 2006 



VIP50 BiCMOS Amps Provide Efficiency, 
Low Noise, Precision, and Low I BIAS 




14 New High-Performance Amplifiers Based on Nationals Award Winning VIP50 Process 



V|N 



Typical Schematic 

-)| — Wn WV— 



< — Wv 




Rext sets desired 
GBW or Isupply 




Product ID 


No. of 
Channel 


Typical Supply 
Current per 
Channel (mA) 


Supply 
Voltage 
Range (V) 


Input Offset 

Voltage 

(mV) 


RRI/O 


Unity Gain 
Bandwidth 
(MHz) 


Low Input 
Current CMOS 
Design 


Feature 


Temp 
Range 


LMP7711/12 


S/D 


1.15 


1.8 to 5.5 


0.15 


RRO 


17 


/ 


Shutdown 


Ext 


LMP7715/16 


S/D 


1.15 


1.8 to 5.5 


0.15 


RRO 


17 


/ 




Ext 


LMP7701/04 


S/Q 


0.72 


2.7 to 12 


0.2 


RRI/O 


2.5 


/ 




Ext 


LMV791/792 


S/D 


0.95 


1.8 to 5.5 


1.3 


RRO 


14 


/ 


Shutdown 


Ext 


LMV796/797 


S/D 


0.95 


1.8 to 5.5 


1.3 


RRO 


14 


/ 




Ext 


LMV651/654 


S/Q 


0.11 


2.7 to 5.5 


1.5 


RRO 


12 






Ext 


LPV531 


S 


Program 


2.7 to 5.5 


3.5 


RRI/O 


Program 




Stand-by 


Ind 


LPV511 


S 


880 nA 


2.7 to 12 


3 


RRI/O 


0.027 






Ind 




For FREE samples, datasheets, and 
WEBENCH® online design tools, visit: 



amplifiers.national.com 



Or call: 1-800-272-9959 







Na t tonal 

Semiconductor 

The Sight & Sound of Information 



5> National Semiconductor Corporation, 2006. National Semiconductor, (jl, WEBENCH, and VIP ai 



■arks of National Semiconductor Corporation. All rights 




for companies that assume that the EU 
ROHS doesn't affect them — either 
because they don't sell into the EU mar- 
ket or because they have an exemption. 
Expect to see longer leadtimes, part short- 
ages, and rising prices for noncompliant 
parts; ultimately, manufacturers will con- 
sign these parts to end-of-life status. 
For example, medical and military 



devices are exempt from EU ROHS com- 
pliance and can continue to use leaded 
solder. "Defense vendors might have a 
problem before too long, because, once a 
supplier consigns a part to end-of-life sta- 
tus, raises the price, or extends the lead- 
time, that has huge ramifications in the 
supply chain," says Avnet's Smith. "If I'm 
the manufacturer of a part, I have to 



decide: If I can't make money doing both, 
which do I eliminate?" As EMA's Roberts 
points out, "The supply chain is the real 
driver in industry, not legislation." 

ROHS has a companion directive, 
WEEE (waste electrical and electronics 
equipment), which specifies the marking 
of electrical and electronic products to 
facilitate their recycling. Again, deter- 



SEVEN TIPS FOR THE BRAVE NEW WORLD OF "GREEN" REGULATIONS 



• You can't rely on con- 
tract manufacturers to 
manufacture your prod- 
ucts to ROHS (reduction- 
of - h aza rdous-su bsta nces) 
specifications. "Your con- 
tract manufacturer won't 
go to court for you" says 
Greg Roberts, marketing 
vice president of EMA, a 
value-added reseller of 
Cadence software. 

• Even if you're exempt, 
you may still have a sup- 
ply-chain problem. 
Suppliers will move inex- 
orably to lead-free manu- 
facturing, and other cus- 
tomers will bid up the 
price of any lead parts 
vital to their designs. 

• You cannot mix and 
match lead and lead-free 
parts. According to elec- 
tronic-component distrib- 
utor Newark InOne, you 



can't assume backward 
compatibility with green, 
lead-free parts (Refer- 
ence A). 

• Manufacturers will 
gradually remove lead 
parts from the supply 
chain, making those parts 
obsolete. Roberts esti- 
mates that it will take four 
to five years for the sup- 
ply chain to stabilize; until 
then, parts availability will 
remain in flux. 

• The ROHS directives 
cover more than electron- 
ics. You should also pay 
attention to the mechani- 
cal assembly and parts, 
such as cadmium-plated 
screws. 

• Know what market 
you are selling your 
design into, suggests Eric 
Larkin, chief technology 
officer for Arena Solu- 



tions, a provider of Web- 
based PLM (product- life- 
cycle management). This 
constraint is a new one 
for design engineers, who 
have traditionally had lit- 
tle interest in the geo- 
graphical regions in which 
their products would sell. 
If your design is targeting 
the Chinese market, 
understand how or 
whether China's regula- 
tions differ from the 
European Union's ROHS 
directive. 

• Ensure that your ven- 
dors assign part numbers 
to green parts different 
from those that they as- 
signed to the older, "non- 
green" parts. Lack of part- 
number distinction is one 
of the top concerns in a 
recent ROHS-customer 
survey by Toshiba's Dis- 



crete Products Division. 
"All of Toshiba's lead -free 
products have a different 
part number to distin- 
guish the lead-free and 
non-lead-free versions," 
says Cynthia Pham, senior 
quality-assurance engi- 
neer for Toshiba. "Not 
every company is doing 
this. It's a logistics night- 
mare if you use parts 
without unique numbers," 
she says (Figure A). 

REFERENCE 

a Shafer, Jeff, "ROHS 
compliant doesn't neces- 
sarily mean backwards 
compatible," www. 
newarkinone.com/ 
services/rohs/backward_ 
compatible.html. 



2000 

OP) Toshiba p/n: TC741CX32FT(EL,M) 

llllllllll llllllllilMlHrNlimi^ll 




COMPANY NAME 

ADDRESS 

CITY STATE ZIP 



SHIP ID: 409Q71 



C00: MY 



PACKAGE COUNT: 

1 OF 1 



TOSHIBA AMERICA ELECT COHP 
C/0 TOSHIBA LOGISTICS AMERICA, II 
S74D IRUfNE BLUD DOCK A 
IRVINE. CA SZS1B 

(O) QUANTITY: 

II llll II II II II 



COMPANY NAME 

ADDRESS 

CITY STATE ZIP 



9000 



SHIP ID: 410035 



<ipj Toshiba p/n: TC7SETO0FU(TE85L,F 

illllMlil llll>lllll|IMIIIIIIIIIII Hill 

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PACKAGE COUNT: 

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Figure A Toshiba's original green product markings say "lead-free" (left), but customers want them to say "ROHS-compatible" or 
"ROHS-compliant." Toshiba maintains that only completed systems can be ROHS-compliant and marks its products that do not 
contain restricted substances "ROHS-compatible" (right). 



42 EDN | JULY 20, 2006 



±1% Accurate, Ultra-High Precision PWM 
Buck Regulator 



LM3495 Controller Provides Design Flexibility and Reliable Protection Features for 
Sensitive Sub-Micron Processors 



Features 

• Input voltage from 2.9V to 18V 

• Adjustable output from 0.6V to 5.5V 

• Feedback accuracy: ±1% over temperature 
and input voltage 

• Switch node fault protection 

• Hiccup mode current limit protection 
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• Internal soft-start with tracking capability 

• 200 kHz to 1.5 MHz switching frequency 
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• Available in TSSOP-16 packaging 

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Ideal for use in ASICs, FPGAs, DSPs, 
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LM3495 Typical Application Circuit 



r 



MODE 



CSYN 



R FRQ 



Shutdown 
Signal 




Rfbi 

Rfb2; 



i 



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D1 



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Semiconductor 

The Sight & Sound of Information 



© National Semiconductor Corporation, 2006. National Semiconductor and $ are registered trademarks of National Semiconductor Corporation. All rights re 



mining how to make disposal and recy- 
cling more efficient goes beyond EU 
countries: Japan has had such a regula- 
tion, the HARL (Home Appliances 
Recycling Law), in place since 2001, and 
California is moving toward a similar law, 
with other states likely to follow- HARL 
and WEEE both require manufacturers to 
be responsible for accepting and recycling 
their products. However, the Japanese law 
allows for the consumer to pay a separate 
fee for recycling, whereas WEEE requires 
that the regional price of the equipment 
include the fee. This new additional cost 
to the manufacturer will drive designers 
to allow for the most effective means of 
recycling their products. Phihong USA's 
Hopgood gives an example the company 
encountered: "Under WEEE, if capacitors 
are over a certain size, they have to be 
removed from the board before recy- 
cling," he says. "Designers will want to 
avoid using parts that trigger recycling 
exceptions, if possible." 



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REFERENCES 

m Quinnell, Richard A, "ROHS compli- 
ance: It's not easy being green," ED/V, 
March 1 6, 2006, 37, www.edn.com/ 
article/CA63 13379. 
a Administrative Measure on the Con- 
trol of Pollution Caused by Electronic 
Information Products, Grace Compli- 
ance Specialist, 2006, www. 
graspllc.com/China%20RoHS.php. 
a "Sony swaps PlayStation One 
cables," Dec 5, 2001, Reuters, news. 
com.com/21 00-1 040-276646. 
html?legacy=cnet. 



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Support for Your Analog World 

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i 



BY WARREN WEBB • TECHNICAL EDITOR 



A s embedded devices permeate society and assume 

ever more important roles, the consequences of 
A security failures are potentially catastrophic. 
A Embedded devices provide unattended operation 
A for thousands of mission-critical or safety-related 
A systems in sectors such as manufacturing, health 
care, transportation, finance, and the military. 
^^^^ Although we rely on these embedded systems with- 
out giving them a second thought, any one could be the potential 
target of casual hackers, organized crime, terrorists, or even adversary 
governments- The responsibility to protect against these attacks falls 
squarely on the shoulders of the system designer, who must secure not 
only the data that passes through or is stored on his embedded 
device, but also the intellectual property of the product itself. 

Historically, designers 
physically protected and 
isolated embedded devices 
to achieve reasonable data 
security. Today, widespread 
interconnectivity may ex- 
pose a critical embedded 
system to data extraction 
or process manipulation 
from anywhere in the 
world. 

Unlike desktop systems, 
an embedded product 
must incorporate all secu- 
rity measures before its 
deployment. Embedded- 
system designers cannot 
wait for a breach and then 
devise a patch to cover 
security flaws. Users ex- 
pect embedded products 
to perform a function for 
years without modifica- 
tion, and you can't stop or 
reboot many devices without risking loss of life, property, or critical 
information. 

Security must be a prime design consideration from conception 
through production, deployment, and end-of-life disposal, because it 
is almost impossible to add to products currently in the field. The 
NIST (National Institute of Standards and Technology) provides 
designers with a number of security-related publications at its CSRC 
(Computer Security Resource Center). These documents outline 
life-cycle design principles to consider, such as security-policy defini- 
tion, product design, threat identification, technological options, 
and programmer education. For example, the first challenge is to 
identify what data or proprietary information requires protection 
before selecting safeguards. It may be possible to reduce or even elim- 
inate sensitive data to minimize the security effort. Next, you should 



SECURITY 
REQUIREMENTS 
NOW TOP 
THE EMBEDDED- 
SYSTEM DESIGNER'S 
CHECKLIST AS 
NETWORKED 
DEVICES MULTIPLY 
AND HACKERS 
OPTIMIZE 
THEIR ATTACK 
TECHNIQUES. 



JULY 20, 2006 | EDN 47 




AT A GLANCE 

EI Threats to portable devices force 
designers to include physical pack- 
aging protection in addition to tradi- 
tional software safeguards. 



EI Unlike the desktop-software prac- 
tice of patch after failure, embedded 
products must continue operation in 
spite of security threats. 



EI Widely available cryptography 
algorithms and secure protocols 
offer embedded-system designers 
the best security protection for 
Internet-connected devices. 



EI New pay-as-you-go business 
models rely on secure hardware and 
software architectures to allow cus- 
tomers to pay for pricey systems as 
they use them. / 



determine your possible attackers and 
their level of sophistication. A simple 
password may stop a curious amateur, 
but determined intruders require multi- 
ple levels of security. 

SEPARATE AND SECURE 

An obvious security measure is to 
physically isolate networked systems 
from outside influence. If you can collo- 
cate the embedded system and server on 
the same network segment without 
Internet access, most security problems 
disappear. Isolation is especially effec- 
tive in highly critical applications, such 
as controlling a factory, where disrup- 
tion would be costly. Minimizing the 
connection time to the Internet can 
also thwart many hacking attempts. A 
short-term connection to exchange 
data at random times prevents search 
robots from identifying your system. 
However, if your embedded system is a 
target of a hacker, short connections 
will only delay unauthorized access. 

Attackers can steal embedded de- 
vices, especially portable products, dis- 
assemble them, and probe them with 
sensitive test equipment to extract data. 
They can remove memory elements 
from the products to possibly extract 
their contents. Likewise, they can use 




OS SERVICES 



OS SERVICES 

USER MODE 



SUPERVISOR MODE 




PARTITIONING KERNEL 
ARDWAR 




Figure 1 The MILS (Multiple Independent Levels of Security) architecture isolates ker- 
nel, middleware, and application components (courtesy LynuxWorks). 



active debugging ports and software to 
read sensitive data or force unintended 
operation. Attackers may even monitor 
electromagnetic radiation or force the 
system to operate outside its design 
parameters, with extreme temperatures, 
voltage excursions, and clock varia- 
tions, to gain information. 

Equipment designers should also 
incorporate physical deterrents to safe- 
guard sensitive or proprietary informa- 

SENSOR POWER 
MANAGEMENT 



tion. A hardened enclosure requiring 
specialized equipment to open may 
deter some attacks. Internally, designers 
should engineer pc boards with security 
in mind. For example, BGA packages 
with critical signals hidden on internal 
board layers complicate probing and 
reverse-engineering. Although you can 
remove some formulations with acid, 
epoxies and conformal coatings also 
provide protection to all or part of a 



CLOCK AND 

SYSTEM 
INTERFACE 




TRUEPRINT FINGERPRINT 

SENSOR ARRAY 
128X8 PIXELS AT 500 PPI 



DYNAMIC 
OPTIMIZATION 
CONTROL AND 
FINGERPRINT 
DETECTION 



ARRAY- 
MANAGEMENT 
AND CONTROL 
REGISTERS 




■ 



BIT PARALLEL 
INTERFACE 



DIGITA-SENSOR CONTROL 
AND NAVIGATION TIMING 



SPI 

MASTER/SLAVE 



T 



CONFIGURATION 
RAM 



FULL FRAME BUFFER 
AND DMA ENGINE 



i 



SECURITY 
ENGINE 



Figure 2 With a 1 2X5-mm footprint, the EntrePad 1510 slide sensor from AuthenTec 
enables secure fingerprint authentication on portable devices. 



48 EDN | JULY 20, 2006 









i wm 





in. 



mulating 25 data channels... 



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© 2006 National Instruments Corporation. LabVIEW, National Instruments, Nl, and ni.com are trademarks 
of National Instruments. Other product and company names listed are trademarks ortrade names of 
their respective companies. 2006-6841 -821-1 01 -D 



^rr NATIONAL 
^INSTRUMENTS 




structure allows consumers, developers, 
and evaluators to specify the security 
functions of a product in standard-pro- 
tection profiles and EALs (evaluation- 
assurance levels)- Another embedded- 



product's sensitive internal circuitry. 

To establish standards for system secu- 
rity, the United States, Canada, and sev- 
eral European nations created the "Com- 
mon Criteria for Information Technolo- 



gy Security Evaluation" usually referred to 
as "the Common Criteria." The Common 
Criteria Web site includes a developer 
section with guidelines and complete 
documentation. The Common Criteria 



SAFEGUARDING KEYS 

By Kris Ardis, Dallas Semiconductor/Maxim 



When most people think 
about security, they first 
think of encryption. An 
embedded system that 
sends and receives only 
triple-DES (Data Encrypt- 
ed Standard)-encrypted 
commands might seem 
difficult to crack. However, 
imagine a house that has 
the most advanced door 
locks and an electronic 
security system; it would 
also be difficult to crack. 
An enterprising thief 
would not try to circum- 
vent the house's protec- 
tion but instead would 
attempt to steal the keys 
or coerce the security code 
from the homeowner. Em- 
bedded systems are prone 
to the same weakness: All 
the encryption in the world 
is futile if someone steals 
the encryption key. 

Proper key protection 
starts with where you 
store the keys. The safest 
place is in the same place 
you will use them. Em- 
bedded systems, there- 
fore, need to store encryp- 
tion keys inside a micro- 
controller and never allow 
the keys to leave. If you 
store the key in an exter- 
nal memory, such as a 
serial EEPROM or an 
external RAM, the micro- 
controller would need to 
fetch the key before using 
it. When the external 
memory transmits the key 
to the microcontroller, it 
transmits it in the clear, 



allowing anyone with an 
oscilloscope or a logic 
analyzer to discover the 
key data. 

On-chip EEPROM or 
flash may also be inade- 
quate protection. A deter- 
mined attacker could 
remove the microcon- 
troller's plastic packaging 
and use a microprobe to 
inspect the memory cells. 
In high-security applica- 
tions, losing the key 
would be catastrophic. An 
attacker would have unim- 
peded access to financial 
networks or could create 
undetectable fake- ID 
cards. 

High-security applica- 
tions present unique 
challenges for IC design- 
ers. Secure microcon- 
trollers, such as Dallas 
Semiconductor's DS5250, 
address this design chal- 
lenge by providing bat- 
tery-backed, nonvolatile 
SRAM for on-chip key 
storage. This custom- 
designed memory can 
link to several tamper- 
detection circuits, both 
on- and off-chip, and 
instantly erase when the 
situation meets one of 
several tampering crite- 
ria. Some on-chip sen- 
sors, such as temperature 
and voltage detectors, 
respond to fault-injection 
attacks. Such attacks 
occur when the secure 
microcontroller is operat- 
ing outside its maximum 



operating range, attempt- 
ing to make cryptograph- 
ic operations fail so that 
the device leaks key data. 
Another kind of on-chip 
sensor detects micro- 
probing attacks. A silicon 
mesh in the top layer of 
the chip initiates a "tamp- 
er destruct" if someone 
shorts or breaks its sub- 
micron traces. Secure 
microcontrollers also 
include self-destruct 
input pins that external 
mechanisms, such as 
microswitches, light sen- 
sors, and pressure sen- 
sors, can trigger. 

Although physical pro- 
tection of the key is criti- 
cal, so is logical protec- 
tion. Secure microcon- 
trollers offer encryption 
accelerators that can 
quickly and securely exe- 
cute standard algorithms. 
Public-key operations 
such as RSA (Rivest, 
Shamir, and Adleman) 
execute in milliseconds, 
and symmetric algorithms 
such as triple DES run in 
microseconds. Hardware 
accelerators are more 
resistant to timing attacks 
than software algorithms, 
because they complete in 
the same number of 
machine cycles regardless 
of the actual values of the 
keys or the data. Secure 
microcontrollers also 
incorporate hardware ran- 
dom-number generators 
that vary in behavior over 



voltage, temperature, and 
process variations, mak- 
ing it impossible for an 
attacker to guess the 
value of generated keys or 
blinding values. 

Encrypted program 
memories provide further 
logical protection for the 
applications running on 
secure microcontrollers. 
When you first initialize 
the system, the secure 
microcontroller uses the 
on-chip random-number 
generator to create a 
unique key, which the sys- 
tem uses to encrypt the 
program space. When the 
device executes, the sys- 
tem decrypts the encrypt- 
ed instructions and places 
them in an on-chip cache 
in real time. This method 
not only protects intellec- 
tual property and thwarts 
reverse-engineering, but 
also prevents an attacker 
from executing malicious 
code. 

Applications concerned 
with security have unique 
challenges to meet. By 
designing secure micro- 
controllers with physical 
and logical security in 
mind, you can create the 
safest foundation for 
applications that must 
protect secret keys. 

Author's biography 
Kris Ardis is a product 
manager for secure 
microcontrollers at Dallas 
Semiconductor/Maxim. 



50 EDN | JULY 20, 2006 



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Figure 3 The Spartan P630 targets military-manpack applications with a hardened, 
sealed enclosure and software for preboot access control and data encryption. 



software security standard, MILS (Multi- 
ple Independent Levels of Security), 
requires a partitioned real-time operating 
system that you can certify with rigorous 
tests (Figure 1). Memory protection and 
guaranteed resource availability allow you 
to manage secure and nonsecure data on 
a single processor. The MILS architecture 
allows designers to create application 
code with tamperproof security features 
that you cannot bypass, that you can ver- 
ify mathematically, and that the system 
always invokes. 

Before a user can interact with a secure 
embedded system, he must undergo an 
authentication process to verify his iden- 
tity. Authentication scenarios may 
include combinations of a secret pass- 
word; a physiological trait, such as a fin- 
gerprint; or a security device, such as a 
smart card or key. For example, the Entre- 
Pad 1510 slide sensor from AuthenTec 
enables fingerprint authentication for 
portable devices such as cell phones. 
Contained in a 12x5-mm, 40-pin BGA 
package, the sensor includes a dense 
128X8-pixel-detection matrix along 
with pattern-matching firmware (Figure 
2). Hackers have been successful in 
obtaining passwords by visually or elec- 
tronically capturing keystrokes or simply 
asking for them through a variety of sub- 
terfuges. Often, passwords pass over local 
wired or wireless networks in the clear or 
unencrypted, and attackers can capture 
them with simple packet-capture pro- 
grams widely available on the Internet. 

CODE AND DECODE 

When an embedded system must con- 
nect to a network or the Internet, design- 
ers turn to encryption to safeguard their 
data. Effective encryption schemes work 
equally well over wired, wireless, or 
power-line communications systems. 
Two basic types of encryption algorithms 
are in use today, both relying on a secret 
key plus an encoding sequence to trans- 
form plain text into cipher text and vice 
versa. With symmetric encryption, the 
sender and receiver use the same key to 
encrypt and decipher a message. Asym- 
metric encryption uses two keys — one for 
encryption and another for decryption. 
Public-key cryptography is a popular form 
of asymmetric encryption that makes one 
of the keys available publicly and keeps 



the other secret. Key distribution and 
secrecy are fundamental problems in 
cryptographic security systems (see side^ 
bar "Safeguarding keys"). 

The most widely used security protocol 
for TCP/IP network traffic is the SSL 
(Secure Sockets Layer), which provides 
data encryption, server authentication, 
message integrity, and optional client 
authentication. SSL comes in 128- and 
256-bit versions whose names refer to the 
length of the session key that encrypted 
transactions generate. The longer the key, 
the more secure the encrypted data. IPSec 
(Internet Protocol Security), another 




Figure 4 Security features allow Pure 
Digital to profitably offer customers a 
one-time-use video camcorder for less 
than $40. 



encryption standard, implements securi- 
ty at the network layer and allows the sys- 
tem to transparently encrypt network 
traffic. You can install IPSec in a gateway 
computer to secure all traffic passing onto 
the Internet without adding overhead to 
individual network nodes. Like most 
other security protocols, IPSec includes 
provisions for both key and message 
exchange. Virtual private networks use 
IPSec to create secure networks over the 
Internet. 

Targeting military-manpack applica- 
tions in which security is paramount, 
General Micro Systems recently intro- 
duced a secure portable PC with a 
6.5x3X0.5-in. main-board footprint 
(Figure 3). The Spartan P630 is a hard- 
ened PC featuring a 1 .4-GHz Pentium-M 
processor, as much as 2 Mbytes of L2 
cache, an embedded GPS (global-posi- 
tioning-system) receiver, and 802.1 lb/g 
wireless communications in a pocket- 
sized form factor. The company can con- 
figure the device with as much as 2 
Gbytes of ECC memory, 16 Gbytes of 
bootable flash, as much as 60 Gbytes of 
hard-disk drive, and an LCD/touchscreen 
in a hardened, sealed enclosure. To ensure 
secure operation, Spartan includes soft- 
ware for preboot access control and data 
encryption along with automatic file 
deletion if someone compromises the sys- 
tem. Spartan also features a six-hour bat- 



52 EDN | JULY 20, 2006 



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with the new CS3003/CS3004 and 
CS3013/CS3014 family of ICs. These 
op amps deliver the industry's most highly 
accurate ICs for applications such as 
temperature control, safety monitoring 
and factory process controllers, where 
high-resolution measurement is critical. 

The CS3003/3004 family of ICs offer 
open-loop gain of up to 150 dB (typical) 
and input offset voltage of only five micro- 
volts, with drift of 0.05 microvolts per 
degree. Critical noise errors are limited 
to 17 nanovolts per root-hertz, which 



is held flat above 2 kHz bandwidth. This 
exceptional performance ensures minimal 
errors due to noise, leakage and drift while 
offering extremely high gain to preserve 
measurement accuracy. 

The CS3013 and CS3014 also feature 
low power consumption — approximately 
50 percent lower compared to competing 
ICs — which is important for new generations 
of battery-powered portable instruments 
and personal monitoring applications. 

With these new products, Cirrus Logic has 
strengthened its portfolio of high-precision 
analog ICs for applications demanding 
superior high-resolution measurement. 



© 2006 Cirrus Logic, Inc. All rights reserved. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document 
may be trademarks or service marks of their respective owners. 



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cooled version operating at —40 to 
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range- Packaging options include a tita- 
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SECURE BUSINESS 

With improving security, device man- 
ufacturers are experimenting with busi- 
ness models to attract more customers. In 
the pay-as-you-go scenario, customers 
receive a fully functional device and 
promise to pay for it as they use it or over 
the life of a subscription plan. If the cus- 
tomer fails to make a payment, the ven- 
dor can disable the device by withhold- 
ing network- activation codes. A strong 
security model then prevents the cus- 
tomer from bypassing activation or 
removing parts. 

For example, Microsoft recently an- 
nounced FlexGo, a pay-as-you-go plat- 
form to extend PC ownership into emerg- 
ing markets. FlexGo requires that system 
components individually track usage 
based on active minutes or a specific end 
date. When a consumer has used all of the 
available computer time, Microsoft lim- 
its access to the PC until the consumer 
adds more time. The company also 
imposes usage limitations when there are 
signs of system tampering. Microsoft has 
also added secure operating-system com- 
ponents to enable metered use of the soft- 
ware. A FlexGo software-development 
kit allows businesses to use their own 
billing systems to manage Microsoft's pro- 
visioning system to offer pay-as-you-go 
computer-use time to customers. 

With stand-alone embedded- security 
challenges, Pure Digital manufactures a 
pocket-sized, one-time-use camcorder 
that records as much as 20 minutes of 
video and audio (Figure 4). The device 
is available through several camera- and 
convenience-store outlets for as little as 
$20 plus a $12 processing charge to copy 
your movies onto a DVD. The device 
includes a fixed-focus lens, a 1.4-in. color 
LCD, and speaker plus operator controls 



ATEDN.COM 



EE For more on a one-time-use video- 
camera, go to www.edn.com/article/ 
CA629314. 

EE For some history on embedded- 
device security, go to www.edn.com/ 
article/CA434871. 

EE We encourage your comments! 
Go to www.edn.com/060720cs and click 
on Feedback Loop to post a comment on 
this article. 



to record, play back, and delete unwant- 
ed scenes. Although the device is a hack- 
er's delight, and several Web sites are 
devoted to extracting the video without 
returning the camcorder for processing, 
there are sufficient security measures to 
deter most users. 

Security precautions and potential in- 
formation-disclosure consequences have 
changed the fundamental design goals for 
embedded products. Designers are no 
longer driven to produce the simplest, 
lowest cost device for each project. Secu- 
rity requirements have forced designers 
to beef up resources with faster, more 
capable processors, secure data storage, 
and tamperproof hardware to protect the 
system and data while executing the 
application.EDN 

FOR MORE INFORMATION 



AuthenTec Inc 

www.authentec.com 

Common Criteria 

www.common 
criteriaportal.org 

Dallas Semiconductor/ 
Maxim 

www.dalsemi.com 
www.maxim-ic.com 

General Micro 
Systems 

www.gms4sbc.com 



LynuxWorks 

www.lynuxworks.com 

Microsoft 

www.microsoft.com 

NIST (National 
Institute of Standards 
and Technology) 

www.nist.gov 

Pure Digital 

www.puredigitalinc.com 



54 EDN 



JULY 20, 2006 



You can reach 
Technical Editor 

at 1-858-513-3713 

and wwebb@edn.com. 



J 



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for Critical Information and Insight n 




Typical Field Programmable Gate Array 
Power Requirements 

The flexibility of FPGAs leads to the requirement for multiple supply voltages and currents. 



Core Voltage / Power 

In large FPGAs, the logic core generally has the most 
demanding current requirements, up to tens of amps 
depending on the number of gates being used and 
the clock frequency. Designated V CC | NT by Altera, by 
platform the voltage required is: 

- Stratix® and Cyclone® series = 1 .5V 

- Stratix II series = 1.2V 



I/O Voltage / Power 

Designated V cco and equal to 1 .5V, 1 .8V, 2.5V or 
3.3V depending on the I/O standard selected. I/O 
standards can be set independently by block in the 
FPGA, so more than one I/O voltage for a single FPGA 
is possible. 




Intersil's Power Management Portfolio of DC/DC Regulators, PWM and LDO Controllers 





VjN 


(V) 




# of 


Int. 


Vout(V) 






3.3V Input 


Min 


Max 


'out 
(max)(A) 


Outputs 


FET 


Min 


Max 


Device Description 


Package 


ISL6410 


3 


3.6 


0.6 


1 


Y 


1.2 


1.8 


0.6 Amp PWM Regulator with Selectable V 0UT of 1 .8, 1 .5, or 1 .2V, 
f sw 750kHz, Adj POR delay in QFN pkg. 


10 MSOP, 16 QFN 


ISL6455 


3 


3.6 


0.6 


3 


Y 


0.8 


2.5 


0.6 Amp PWM Regulator and Dual 0.3 Amp LDOs and Reset 


24 QFN 


ISL8011 


2.5 


5.5 


1 


1 


Y 


0.8 


V,N 


1 .2 Amp PWM Regulator, f sw 1 .4MHz 


10DFN 


EL7532 


2.5 


5.5 


2 


1 


Y 


0.8 


V,N 


2 Amp PWM Regulator with 100mS Power On Reset, f sw 1.5MHz 


10 MSOP 


ISL8012* 


2.7 


5.5 


2 


1 


Y 


0.8 


V,N 


2 Amp PWM Regulator with pre-biased load start-up, f sw 1.5MHz 


14 HTSSOP, 14 QFN 


ISL8013 


2.5 


5.5 


3 


1 


Y 


0.8 


V,N 


3 Amp PWM Regulator with 100mS Power On Reset 


14 HTSSOP 


ISL8014* 


2.7 


5.5 


4 


1 


Y 


0.8 


V,N 


4 Amp PWM Regulator with pre-biased load start-up, f sw 1.5MHz 


14 HTSSOP, 14 QFN 


EL7554 


3 


6 


4 


1 


Y 


0.8 


V,N 


4 Amp PWM Regulator with ±5% Voltage Margining and Sequencing 


28 HTSSOP 


EL7566 


3 


6 


6 


1 


Y 


0.8 


V,N 


6 Amp PWM Regulator with ±5% Voltage Margining and Sequencing 


28 HTSSOP 


ISL65424 


2.375 


5.5 


4 


2 


Y 


0.6 


V,N 


Dual 4A Iqut- 1 -5MHz f sw ; programmable I ut ancl v out 


50 QFN 


ISL65426 


2.375 


5.5 


6 


2 


Y 


0.6 


V,N 


Dual 6A Iqut- 1 -5MHz f sw ; programmable I ut ancl v out 


50 QFN 


ISL6406 


3 


3.6 


20 


1 




0.8 


0.95 xV, N 


PWM Controller with Adj f sw 100kHz to 770kHz with Ext Freq Sync 


16SOIC, 

16TSSOP, 16 QFN 


ISL6439 


3 


3.6 


20 


1 




0.8 


V,N 


PWM Controller with f sw 300 or 600kHz 


14 SOIC, 16 QFN 


ISL6527/A 


3 


3.6 


20 


1 




0.8 


V,N 


PWM Controller with f sw 300 or 600kHz, External Reference 


14 SOIC, 16 QFN 


ISL8104 


1.2 


12 


20 


1 




0.6 


V,N 


PWM Controller with 50kHz to 1 .5MHz f sw 


14SOIC 


ISL8105/A 


1 


12 


20 


1 




0.6 


V,N 


PWM Controller with 300kHz and 600kHz options 


14 SOIC 



* Coming Soon 

intetsil 

HIGH PERFORMANCE ANALOG 



Intersil - Switching Regulators for precise power delivery. 




2 www.intersil.com/power 





v, 


SI 


(V) 








# of 




Int. 


Vout(V) 








5V Input 


Min 




Max 




'out 
(max)(A) 




Outputs 




FET 


Min 


Max 


Device Description 




Package 


IOI RA A OA 

lol_b41UA 


4.5 


5.5 


0.6 


1 


Y 


1 .2 


3.3 


u.b Amp rWM Keguiator witn oeiectaDie Vqut 0' i .o, or i .zv, t sw 
750kHz, Adj POR delay in QFN pkg. 


1U MoUr, lb UrN 


ISL6455A 


4.5 


5.5 


0.6 


3 


Y 


0.8 


3.3 


0.6 Amp PWM Regulator and Dual 0.3 Amp LDOs and Reset 


24 QFN 


ISL8011 


2.5 


5.5 


1 


i 


Y 


0.8 


V,N 


1 .2 Amp PWM Regulator, f sw 1 .4MHz 


10DFN 


EL7532 


2.5 


5.5 


2 


! 


Y 


0.8 


V|N 


2 Amp PWM Regulator with 100mS Power On Reset, f sw 1.5MHz 


10MSOP 


ISL8012* 


2.7 


5.5 


2 


1 


Y 


0.8 


V|N 


2 Amp PWM Regulator with pre-biased load start-up, f sw 1.5MHz 


14 HTSSOP, 14 QFN 


ISL8013 


2.5 


5.5 


3 


! 


Y 


0.8 


V|N 


3 Amp PWM Regulator with 100mS Power On Reset 


14 HTSSOP 


ISL8014* 


2.7 


5.5 


4 


! 


Y 


0.8 


V|N 


4 Amp PWM Regulator with pre-biased load start-up, f sw 1.5MHz 


14 HTSSOP, 14 QFN 


EL7554 


3 


6 


4 


! 


Y 


0.8 


V|N 


4 Amp PWM Regulator with ±5% Voltage Margining and Sequencing 


28 HTSSOP 


EL7566 


3 


6 


6 


i 


Y 


0.8 


V|N 


6 Amp PWM Regulator with ±5% Voltage Margining and Sequencing 


28 HTSSOP 


ISL8502* 


4.5 


5.5 


2 


! 


Y 


0.6 


V|N 


2 Amp PWM Regulator with Integrated MOSFETs 


24 QFN 


ISL8501* 


4.5 


5.5 


1 


! 


Y 


0.6 


V,N 


1 Amp PWM Regulator with Dual 0.45 Amp LDOs 


24 QFN 


ISL65424 


2.375 


5.5 


4 


2 


Y 


0.6 


V| N 


Dual 4A I ut- 1 -5MHz f sw ; programmable I ut ancl v out 


50 QFN 


ISL65426 


2.375 


5.5 


6 


2 


Y 


0.6 


V| N 


Dual 6A I ut- 1 -5MHz f sw ; programmable I ut ancl v out 


50 QFN 


ISL6440 


4.5 


5.5 


10 


2 




0.8 


0.9xV| N 


Dual PWM Controllers with Wide V, N , f sw 300kHz 


24 QSOP 


ISL6445 


4.5 


5.5 


10 


2 




0.8 


5.5 


Dual Synchronous Buck PWM Controller with Wide V, N , f sw 1.4MHz 


24 QSOP 


IOI CA A A 

Ibl_b441 


4.5 


5.5 


6 


3 




0.8 


0.7 x V )N 


Dual rWM Controllers with Wide V^, t sw 1 .4MHz and Linear Controller 


28 QFN 


IOI CA A 1 ") 

loLb44z 


4.5 


5.5 


20 


3 




0.8 


V IN 


Dual rWM Controllers with Wide V|n, t sw z.4MHz and Linear Controller 


z4 UoUr 


IOI CA AO 

Iol_b44o 


4.5 


5.5 


10 


3 




0.8 


0.9 x V| N 


Dual rWM Controllers with Wide V|n, t sw oUUkHz and Linear Controller 


28 QFN 


ioi c/nriA 

loLb4zUA 


4.5 


5.5 


20 


1 




0.6 


V IN 


rWM Controller with Wide v^, btart-up into rre-Bias Load 


on nrM on r\or\n 
zU UrN, zU UoUr 


ioi o/ino 

loLb4Ub 


4.5 


5.5 


20 


1 




0.8 


0.95 x V|n 


rWM Controller with Adj t sw 1 UUkHz to / / UkHz with bxt hreq bync 


lb oUIC, 

16TSSOP, 16 QFN 


ISL6439 


4.5 


5.5 


20 


1 




0.8 


V,N 


PWM Controller with 300 or 600kHz Osc 


14 SOIC, 16 QFN 


IOI OCOV/A 

loLboz //A 


4.5 


5.5 


20 






0.8 


V IN 


PWM Controller with oUU or bUUkHz Use, bxternal Keterence 


A a of-wr* AC ncn 

14 oUIC, lb UrN 


ISL6521 


4.5 


5.5 


20 






0.8 


4.5 


PWM Controller and Triple Linear Controllers 


16 SOIC 


ISL8104 


1.2 


12 


20 


1 




0.6 


V| N 


PWM Controller with 50kHz to 1 .5mHz f sw 


14 SOIC, 14 QFN 


ISL8105/A 


1 


12 


20 






0.6 


V|N 


PWM Controller with 300kHz and 600kHz options 


14 SOIC, 14 QFN 


ISL8101 


5 


12 


>60 






0.6 


2.3 


Two Phase Multiphase Buck PWM Controller with MOSFET Drivers, 
f sw 250kHz/Phase 


24 QFN 


ISL8102 


5 


12 


80 






0.6 


2.3 


Two Phase Buck PWM Controller with High Current MOSFET Drivers, 
f sw 1.5MHz/Phase 


32 QFN 


ISL8103 


5 


12 


100 






0.6 


2.3 


Three Phase Buck PWM Controller with High Current MOSFET 
Drivers, f sw 1.5MHz/Phase 


40 QFN 






V|N 


( 


V) 








# of 




Int. 


Vqut(V) 








12V Input 


Min 




Max 




'out 
(max)(A) 




Outputs 




FET 


Min 


Max 


Device Description 




Package 


ISL8502* 


5.6 


15 


2 


1 


Y 


0.6 


V, N 


2 Amp PWM Regulator with Integrated MOSFETs 


24 QFN 


ISL8501* 


5.6 


22 


1 


3 


Y 


0.6 


V, N 


1 Amp PWM Regulator with Dual 0.45 Amp LDOs 


24 QFN 


ISL6440 


5.6 


24 


10 


2 




0.8 


0.9xV, N 


Dual PWM Controllers with Wide V, N , f sw 300kHz 


24 QSOP 


ISL6445 


5.6 


24 


10 


2 




0.8 


5.5 


Dual Synchronous Buck PWM Controller with Wide V, N , f sw 1.4MHz 


24 QSOP 


ISL6441 


5.6 


24 


6 


3 




0.8 


0.7xV| N 


Dual PWM Controllers with Wide V, N , f sw 1 .4MHz and Linear Controller 


28 QFN 


ISL6442 


5.6 


24 


20 


3 




0.8 


V, N 


Dual PWM Controllers with Wide V, N , f sw 2.4MHz and Linear Controller 


24 QSOP 


ISL6443 


5.6 


24 


10 


3 




0.8 


0.9xV, N 


Dual PWM Controllers with Wide V, N , f sw 300kHz and Linear Controller 


28 QFN 


ISL6420A 


5.6 


28 


20 


1 




0.6 


V, N 


PWM Controller with Wide V, N , Start-Up into Pre-Bias Load 


20 QFN, 20 QSOP 


ISL8104 


1.2 


12 


20 


1 




0.6 


V, N 


PWM Controller with 50kHz to 1 .5MHz f sw 


14 SOIC 


ISL8105/A 


1 


12 


20 


1 




0.6 


V| N 


PWM Controller with 300kHz and 600kHz options 


14 SOIC 


ISL8101 


5 


12 


>60 


1 




0.6 


2.3 


Two Phase Multiphase Buck PWM Controller with MOSFET Drivers, f sw 
250kHz/Phase 


24 QFN 


ISL8102 


5 


12 


80 


1 




0.6 


2.3 


Two Phase Buck PWM Controller with High Current MOSFET Drivers, 
f sw 1.5MHz/Phase 


32 QFN 


ISL8103 


5 


12 


100 


1 




0.6 


2.3 


Three Phase Buck PWM Controller with High Current MOSFET Drivers, 
f sw 1.5MHz/Phase 


40 QFN 



* Coming Soon 

intefsil 



Intersil - Switching Regulators for precise power delivery. 




www.intersil.com/power 3 



The "One-Chip" Power Solution 

Intersil's multi-output family of PWM controllers and Integrated FET regulators support up to four rails, 
providing a "one-chip" solution for most applications. 



Multiple Output/Multi-Phase IFETs and Controllers 


Part Number 


Architecture 




ISL6455 


1 PWM Regulator + 2 LDOs 


3.0-3.6 


0.8-2.5 


0.6 


ISL6455A 


1 PWM Regulator + 2 LDOs 


4.5-5.5 


0.8-3.3 


0.6 


ISL8501 


1 PWM Regulator + 2 LDOs 


6.0-22 


0.6-22 


1 


ISL6440 


2 PWMs 


4.5-24 


0.8-24 


10 


ISL6445 


2 PWMs 


4.5-24 


0.8-5.5 


10 


ISL6441 


2 PWMs (f sw = 1 .4MHz) + Linear Controller 


4.5-24 


0.8-24 


20 


ISL6442 


2 PWMs (f sw = 2.5MHz) + Linear Controller 


4.5-24 


0.8-24 


20 


ISL6443 


2 PWMs (f sw = 300kHz) + Linear Controller 


4.5-24 


0.8-24 


20 


ISL65424 


2 PWM Regulators 


2.375-5.5 


0.6-5.5 


4 


ISL65426 


2 PWM Regulators 


2.375-5.5 


0.6-5.5 


6 


ISL8101 


3 Phase PWM 


5.0-12 


0.6-2.3 


100 


ISL8102 


2 Phase PWM 


5.0-12 


0.6-2.3 


60 


ISL8103 


2 Phase PWM 


5.0-12 


0.8375-1.6 


60-80 



ISL65426: 6A Dual Synchronous 
Regulators for V CC , NT and V cco 







The ISL65426 is a high efficiency dual output synchronous 
buck regulator with integrated power MOSFETs, tailor-made 
for FPGA power solutions. Operating from an input bias 
ranging from 2.375V to 5.5V, the single ship solution provides 
two output voltages which are selectable or externally 
adjustable from 0.8V to 4.0V while delivering up to 6A of total 
output current. The two regulator outputs can be used to 
supply V CC | NT and V CC | with a reduced number of external 
components and high efficiency. 

The power block contains six 1 A capable blocks to support one 
of the four output configuration options (3A:3A, 4A:2A, 5A:1A, 
2A:4A). 

High integration contained in a thin Quad Flat No-Lead (QFN) 
package makes the ISL65426 the ideal choice to power small 
form factor power management applications. 



I1SET 


I2SET 


IOUT1 


CHANNEL1 
CONNECTIONS 


IOUT2 


CHANNEL2 
CONNECTIONS 


1 


1 


3A 


LX1.LX2, LX3 


3A 


LX4, LX5, LX6 


1 





4A 


LX1.LX2, LX3, LX4 


2A 


LX5, LX6 





1 


5A 


LX1.LX2, LX3, LX4, LX6 


1A 


LX5 








2A 


LX1.LX2 


4A 


LX3, LX4, LX5, LX6 



X 




vcc R1 

■Wv <VIN 



GND 
PGND 



V| 




jntetsil 

HIGH PERFORMANCE ANALOG 



Intersil - Switching Regulators for precise power delivery. 




ISL644X: High Efficiency Dual, 
Step Down PWM Controllers with 
Single Linear Controller 



www.intersil.com/power 



ISL6521 : PWM Controllers for V CC | NT and ^ 
Linear Regulators for V CC01 V CCAUX and V CC02 



Combination products that incorporate multiple switchers 
and/or linears in a single package are an excellent choice for 
many FPGA-based designs. These combination devices can 
provide all the voltages required from a single IC or board, and 
they can be adjusted to provide the optimum responses for 
the end application. Good layout and bypassing techniques 
plus excellent on-chip isolation prevents the supplies from 
interacting. 

The ISL6521 can provide the required currents and voltages 
for the latest generation of Altera FPGAs (for example Stratix 
II, Stratix and Cyclone series) in a 16-pin SOIC package 
with minimal external components. The ISL6521 implements 
a highly efficient synchronous buck design and in addition 
includes three linear regulators, which can provide additional 
voltages to the board. I CC0 and Iqcaux currents less than 
1 20mA can be supplied directly from the linear regulator drive 
pins (as shown here for V CC0 2) or they can be used to control 
an external transistor (as shown here for V CCO i and V CCAUX ). 



The complete datasheet for the ISL6521 is available at 
www.intersil.com/data/fn/fn9148.pdf. Simulation tools are 
also available at www.intersil.com/isim/. r— ^ 



300kHz to 2.5MHz Family of Dual, 180° Out-of- 
Phase, PWM Controllers + Linear Controller 

The ISL644X family of controllers can create a highly efficient 
triple-output solution by using 180° out-of-phase synchronous 
buck switchers to supply V CC | NT and V CC | . It also has an 
internal 5V Linear regulator that can sink and source current. 
The Linear regulator can source up to 6A using an external 
transistor. The ISL644X family offers a wide input range of V !N 
from 5.6V to 24V and 4.5V to 5.6V. 

The two PWMs synchronized 180° out-of-phase reduce the 
RMS input current and ripple voltage, hence can supply both 
Core and I/O voltages independently. The ISL644X family 
incorporates several Protection and supervisory features. 
Power-up sequencing is available through the integrated 
programmable Soft-Start. The outputs can be adjustable down 
to 0.8V and up to 24V. The efficiency of the ISL644X family is 
enhanced by using the lower MOSFET Rds(on)- 



The complete datasheet for the ISL6441 is available at 
www.intersil.com/data/fn/fn9197.pdf. Simulation tools are 
also available at www.intersil.com/isim/. r-^ 



ISL6420A: Advanced Single 
Synchronous Buck PWM Controller 



The ISL6420A is an excellent solution for all the FPGA family's 
power requirements. It has a wide input voltage range from 
4.5V to 28V and a programmable output current capability up 
to 20A. 

The core or the I/O voltages are supplied by a synchronous 
buck switcher with fast transient response which makes the 
solution very efficient. The output voltages of the ISL6420Aare 
fully adjustable from 0.6V to 28V, with a maximum tolerance of 
±1 .0% over temperature and line voltage variations. 

The switching frequency is resistor selectable from 100kHz to 
1 .4MHz which offers cost and space savings. The ISL6420A 
integrates control, output adjustment, monitoring and protection 
functions into a single package. The ISL6420A is available in 
QFN and QSOP packages. 



The complete datasheet for the ISL6420A is available at 
www.intersil.com/data/fn/fn9169.pdf. Simulation tools are 
also available at www.intersil.com/isim/. 



>20A Solutions: ISL8102 
Multi-phase Buck PWM Controller 



As the current requirements of the board rise to greater than 
20A, more sophisticated power supply solutions are required 
to maintain well-regulated supply voltages. By distributing 
the power and load current, implementation of multi-phase 
converters utilize smaller and lower cost transistors with fewer 
passives. These reductions are possible due to the phase 
interleaving process of this topology. 

The ISL8102 is a two-phase PWM control IC with Integrated 
MOSFET drivers. It has the system voltage regulation accuracy 
up to ±0.5% over temperature. It integrates an optional Load 
Line (Droop) programming, using the loss-less inductor 
DCR current sampling. Precision channel current sharing is 
implemented using loss-less Rds(on) current sampling, which 
makes it a highly efficient solution. 



The complete datasheet for the ISL8102 is available at 
www.intersil.com/data/fn/fn9247.pdf. Simulation tools are 
also available at www.intersil.com/isim/. r— ^ 



Intersil - Switching Regulators for precise power delivery. 



^ Jntefsil 



Stratix-ll 


Power Requirement Summary 














EP2S15 


EP2S30 


EP2S60 


EP2S90 


EP2S130 


EP2S180 


V CCINT 


1.2V 


1.2V 


1.2V 


1.2V 


1.2V 


1.2V 


V CCIO 


1.5,1.8, 2.5, 3.3V 


1.5,1.8,2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


'ccint (max) 


4A 


6A 


7A 


9A 


12A 


16A 


'ccio ( max ) 


10A (all 8 banks) 


10A(all 8 banks) 


10A (all 8 banks) 


10A (all 8 banks) 


10A (all 8banks) 


10A (all 8 banks) 



Intersil Power Solutions for Stratix-ll FPGAs 


















V|N = 3-3V 


V|N = 5V 


Vm = 12V 


V, N = 24V 


V CCINT 


V C CINT=1-2V 


l CC i NT < 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




'CCINT = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 




'ccint = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 




■ccint = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 




'ccint = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 




'CCINT^OA 


EL7554, EL7556, ISL6406 


ISL6406, ISL6439, ISL6527/A 


ISL6420A 


ISL6420A 


V CCIO 


V CC10 = 1.5V 


Iccio * 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 




■ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 




■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 




l CC io = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 




Iccio ^1 OA 


EL7554, EL7556, ISL6406 


ISL6406, ISL6439, ISL6527/A 


ISL6420A 


ISL6420A 


V CC10 =1.8V 


Iccio * 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 




■ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 




■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 




Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 




Iccio ^1 OA 


EL7554, EL7556, ISL6406 


ISL6406, ISL6439, ISL6527/A 


ISL6420A 


ISL6420A 


V CC | = 2.5V 


Iccio * 600mA 


ISL8010 


ISL8010 


ISL8502, ISL8501 


ISL6420A 




■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 




■ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 




■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 




Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 




Iccio ^1 OA 


EL7554, EL7556, ISL6406 


ISL6406, ISL6439, ISL6527/A 


ISL6420A 


ISL6420A 


Vccio = 3.3V 


Iccio * 600mA 


ISL8010, ISL6410A 


ISL8010, ISL6410A 


ISL8502, ISL8501 


ISL6420A 




■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 




■ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 




■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 




Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 




Iccio ^1 OA 


EL7554, EL7556, ISL6406, 
ISL8104, ISL8105A 


ISL6406, ISL6439, ISL6527/A, 
ISL8104, ISL8105A 


ISL6420A, ISL8104, 
ISL8105A 


ISL6420A 


V CCPD 


Vccpd = 3-3V 


Iccpd * 300mA 


ISL8010, ISL6410A 


ISL8501 , ISL8502 


ISL6420A 


ISL6420A 



* Coming Soon 



Intersil - Switching Regulators for precise power delivery. 



^ inters! | 



6 www.intersil.com/power 



Stratix Power Requirement Summary 

^^^^^^^H — I — — I — — I — — I — 

^^^^^H EP1S10 EP1S20 EP1S25 EP1S30 EP1S40 EP1S60 EP1S80 



V CC|NT 1.5V 1.5V 1.5V 1.5V 1.5V 1.5V 1.5V 

V CC|0 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 1 .5, 1 .8, 2.5, 3.3V 

l CC i NT (max) 1.5A 3.5A 4A 5.5A 6A 7.5A 10A 

l CC i (max) 12A (all 8 banks) 12A (all 8 banks) 12A (all 8 banks) 12A (all 8 banks) 12A (all 8 banks) 12A (all 8 banks) 12A (all 8 banks) 



Intersil Power Solutions for Stratix FPGAs 




V|N = 3-3V 


V|N = 5V 


V|N = 12V 


V|N = 24V 


V CCINT 


V CC1NT = 1.5V 


Iccint^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 


'CCINT = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


'CCINT = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


'CCINT = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


'CCINT = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


'CCINT^IOA 


EL7554, EL7556, ISL6406 


ISL6406, ISL6439, ISL6527/A 


ISL6420A 


ISL6420A 


V CCIO 


V CC | = 1.5V 


Iccio 55 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 


'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


1 - OA 

'ccio za 


pi iqi «ni9* 

CL/OOZ, IOLOUIZ 


pi iz'io iqi «ni9* 

CL/OOZ, loLOUIZ 


|C| R49f)A 


|C| RiOnA 


"ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


Iccio ^1 OA 


EL7554, EL7556, ISL6406, 
ISL8104, ISL8105A 


ISL6406, ISL6439, ISL6527/A, 
ISL8104, ISL8105A 


ISL6420A, ISL8104, 
ISL8105A 


ISL6420A 


V CC10 = 1.8V 


Iccio ^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 


"ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


"CCIO = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


"ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


Iccio ^1 OA 


EL7554, EL7556, ISL6406, 
ISL8104, ISL8105A 


ISL6406, ISL6439, ISL6527/A, 
ISL8104, ISL8105A 


ISL6420A, ISL8104, 
ISL8105A 


ISL6420A 


V CCI0 = 2.5V 


Iccio * 600mA 


ISL8010 


ISL8010 


ISL8502, ISL8501 


ISL6420A 


■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


'ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


Iccio ^1 OA 


EL7554, EL7556, ISL6406, 
ISL8104, ISL8105A 


ISL6406, ISL6439, ISL6527/A, 
ISL8104, ISL8105A 


ISL6420A, ISL8104, 
ISL8105A 


ISL6420A 


Vccio = 3.3V 


Iccio * 600mA 


ISL8010, ISL6410A 


ISL8010, ISL6410A 


ISL8502, ISL8501 


ISL6420A 


■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


■ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


'ccio = 4A -6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


Iccio ^1 OA 


EL7554, EL7556, ISL6406, 
ISL8104, ISL8105A 


ISL6406, ISL6439, ISL6527/A, 
ISL8104, ISL8105A 


ISL6420A, ISL8104, 
ISL8105A 


ISL6420A 



* Coming Soon 



Intersil - Switching Regulators for precise power delivery. 



^ Jntefsil 



www.intersil.com/power 7 



| Cyclone Power Requirement Summary 


f 


j^^^^^^^H EP1C3 


EP1C4 


EP1C6 


EP1C12 


EP1C20 


V CCINT 


1.5V 


1.5V 


1.5V 


1.5V 


1.5V 


V CCIO 


1.5,1.8,2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8,2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


'cciNT(max) 


750mA 


1A 


1.5A 


3A 


5A 


'ccio ( m a x ) 


6A (all 4 banks) 


6A (all 4 banks) 


6A (all 4 banks) 


6A (all 4 banks) 


6A (all 4 banks) 



Intersil Power Solutions for Cyclone FPGAs 




V|N = 3-3V 


V|N = 5V 


V|N = 12V 


V|N = 24V 


V CCINT 


V CCINT =1.5V 


Iccint^ 600mA 


ISL6410, EL7530 


ISL6410A, EL7530 


ISL8502, ISL8501 


ISL6420A 


'CCINT = 1A 


ISL8011, EL7536 


ISL8011, EL7536, ISL8501 


ISL6420A 


ISL6420A 


'CCINT = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


'CCINT = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


'CCINT = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


V CCIO 


V CCI0 = 1.5V 


l CC io^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 


'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


"CCIO = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


"ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


'ccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


V CC | =1.8V 


Iccio * 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 


lccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


"ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


"ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


V CCI0 = 2.5V 


Iccio ^ 600mA 


ISL8010 


ISL8010 


ISL8502, ISL8501 


ISL6420A 


"ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


"ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


■ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 


Vccio = 3-3V 


Iccio ^ 600mA 


ISL8010, ISL6410A 


ISL8010, ISL6410A 


ISL8502, ISL8501 


ISL6420A 


■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


'ccio = 2A 


EL7532, ISL8012* 


EL7532, ISL8012* 


ISL6420A 


ISL6420A 


'ccio = 3A 


ISL8013 


ISL8013 


ISL6420A 


ISL6420A 


Iccio = 4A-6A 


EL7554, EL7556, ISL8014* 


EL7554, EL7556, ISL8014* 


ISL6420A 


ISL6420A 



* Coming Soon 



Intersil - Switching Regulators for precise power delivery. 



jntetsil 

HIGH PERFORMANCE ANALOG 



MAX II Power Requirement Summary 



EPM240 EPM240G EPM570 EPM570G EPM1270 EPM1270G EPM2210 EPM2210G 



V CCINT 


2.5 or 3.3V 


1.8V 


2.5 or 3.3V 


1.8V 


2.5 or 3.3V 


1.8V 


2.5 or 3.3V 


1.8V 


V CCIO 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


1.5,1.8,2.5, 3.3V 


1.5,1.8, 2.5, 3.3V 


'cciNT(max) 


75mA 


75mA 


125mA 


125mA 


250mA 


250mA 


400mA 


400mA 


'ccio ( max ) 


450mA 
(both banks) 


450mA 
(both banks) 


450mA 
(both banks) 


450mA 
(both banks) 


900mA 
(all 4 banks) 


900mA 
(all 4 banks) 


900mA 
(all 4 banks) 


900mA 
(all 4 banks) 



Intersil Power Solutions for MAX-I 


I CPLDs 


















V|N = 3-3V 


V|N = 5V 


V|N = 12V 


V|N = 24V 


V CCINT 


V CCINT - 1 - 8V 


Iccint^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




'CCINT = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


V C CINT = 2.5V 


Iccint^ 600mA 


ISL8010 


ISL8010 


ISL8502, ISL8501 


ISL6420A 




'CCINT = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


Vccint=3.3V 


Iccint^ 600mA 


ISL8010, ISL6410A 


ISL8010, ISL6410A 


ISL8502, ISL8501 


ISL6420A 




'CCINT = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


V CCIO 


V CC | = 1.5V 


l CC io^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


V CC | = 1.8V 


Iccio^ 600mA 


ISL6410, ISL8010 


ISL6410A, ISL8010 


ISL8502, ISL8501 


ISL6420A 




■ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


V CCI0 = 2.5V 


Iccio ^ 600mA 


ISL8010 


ISL8010 


ISL8502, ISL8501 


ISL6420A 




'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 


V CCI0 = 3.3V 


Iccio ^ 600mA 


ISL8010, ISL6410A 


ISL8010, ISL6410A 


ISL8502, ISL8501 


ISL6420A 




'ccio = 1A 


ISL8011 


ISL8011, ISL8501 


ISL6420A 


ISL6420A 



For more information about Intersil Solutions for 
Altera™ FPGAs, go to http://www.intersil.com/ 
eLiterature/LC-055/LC-055.pdf. 



inteisil 

HIGH PERFORMANCE ANALOG 

www.intersil.com 



1001 Murphy Ranch Road, Milpitas, CA 95035 
North America 1-888-INTERSIL 
International (01) 1-321-724-7143 



LC-055.0 Printed in USA© 2006 Intersil Americas Inc. All Rights Reserved. The following are trademarks or registered trademarks of Intersil Americas Inc.: 
Intersil, Intersil logo, "i" and Design. All other trademarks are the property of the respective trademark owners. 



BY WILLIAM J. BOWHERS . MERRIMACK COLLEGE 



Magnetic-field measure 
merits hold the key 
to reducing dc/dc EMI 

POWER CONVERTERS FREE SYSTEM DESIGNERS FROM 
UNWIELDY CONSTRAINTS, BUT THE DEVICES RADIATE 
UNSPECIFIED FIELDS THAT CAN DESTROY THE SIGNAL/NOISE 
PERFORMANCE OF SENSITIVE CIRCUITS NEARBY. MAGNETIC- 
FIELD MEASUREMENTS HOLD THE KEY TO FINDING AND COR- 
RECTING THESE PROBLEMS. 



Performance-driven measurement instrumentation 
requires low-noise, high-bandwidth linear front- 
end circuits that combine with equally well-per- 
forming A/D converters and clocking (Figure 1 ). 
Designers work to quantize the measurement of 
interest into a digital signal early in the process- 
ing chain to keep out unwanted noise- Look at your favorite 
instrumentation Web sites. A brief scan of dc-measurement and 
ac-source-and-measurement instrumentation turns up instru- 
ments with dynamic ranges of 120 dB or more- Engineering for 
dynamic range is a search for the source of every spurious sig- 
nal. High-performance- instrument designers must be aware of 
all of the potential noise sources — not just the usual culprits, 
such as power supplies and digital activity. As dynamic range 
exceeds 100 dB, engineering for high SNR leads to investigat- 
ing the charge pump running in the FPGA, the thermal gradi- 
ent that occurs when the processor starts and stops, and the mag- 
netic coupling from the other instru- 
ment that someone set on top of your 
instrument. A significant part of the 
design is isolating precision analog ; 
circuits from internal and external : 
electromagnetic activity. 

Today's instrumentation-and-meas- 
urement industry is undergoing a 
transformation. After years of per- 
formance-based engineering, market 
forces are leading to new open archi- 
tectures (Figure 2). With customers 
wanting the advantages of open 
architecture without performance 
compromise, the new environment 
brings new engineering challenges. 

For example, consider the semi- 
conductor-test industry, in which the 
test requirements of SOC (system- 




Figure 1 Performance-driven measurement instrumentation 
requires low-noise, high-bandwidth linear front-end circuits cou- 
pled to equivalent-performing A/D converters and clocking. It also 
requires a power supply, sometimes line-powered, as shown, but 
often a dc/dc converter. 



SIGNAL 




| PLL | O 



EXTERNAL q N 
TRIGGER ■ 



TRIGGER 
CONTROL 



DSP 



POWER 
MANAGEMENT 



BUS 
INTERFACE 



INSTRUCTION 
BUS 



SHARED 
SUPPLY 



Figure 2 After years of performance-based engineering, market forces are leading to new 
open architectures. At the block-diagram level, open and proprietary architectures are similar, 
but, at the implementation level, the differences can be significant. 



JULY 20, 2006 | EDN 57 



on-chip) ICs drive up the breadth of instrumentation that test 
systems must contain. Time to market and the cost of owner- 
ship of large ATE (automatk>test-equipment) systems have 
combined to define a critical need for an open-test-system archi- 
tecture (Reference 1)- The trend exceeds the bounds of just 
ATE, however. A growing need exists for high-performance, 
modular VXI and PXI instrumentation for production testing 
and characterization. Test- equipment architectures are open- 
ing up as a strategy to reduce cost through greater flexibility, 
which leads to higher efficiency, greater reuse, and lower bar- 
riers to competition among suppliers. 

So where does this trend leave instrument-development 
teams? During the era of performance-driven design, develop- 
ment teams had control over a large part of the system archi- 
tecture. That's not the case in open, card-modular architectures, 
such as VXI. In such architectures, the backplane interface and 
physical-packaging limits highly constrain design engineers. 
Engineers need to place more emphasis on environmental issues, 
such as cooling, power conversion, and EMI (electromagnetic 
interference). One of the more significant of these challenges 



is EMI from power-conversion components within the instru- 
mentation system. A dc/dc converter within the system relieves 
a combination of space and power-supply constraints, but it also 
generates noise, which could be the factor that limits your spu- 
rious-free dynamic range. This scenario can occur whether this 

OSCILLOSCOPE 
1-MO INPUT 



AMPLIFIER 




Figure 4 A wideband amplifier amplifies the pickup-loop output 
and drives an oscilloscope and a spectrum analyzer. Wiring the 
signal to the amplifier and from the amplifier to the instruments 
requires care to avoid introducing spurious signals that can 
reduce the measurement accuracy. 





Figure 3 A varying magnetic field induces in a pickup loop a volt- 
age proportional to the loop area and rate of change of the field 
component normal to the plane of the loop. 




Figure 5 The intent 
is to place the pick- 
up loop 1 in. above 
the plane that 
would represent the 
surface of the moth- 
erboard if the con- 
verter were mount- 
ed in an appropriate 
through-hole 
design. 



■ Ch1 Coupling 
1 & Impedance 



■I Ch1 Coupling 
] & Impedance 



*0Hmm ft***™** l Him ,^**" > l$0mmmf { GHD/h 



M 400ns A Chi I 23.7mV 



l ann 5.oomv 



M 1 .00 US A Cll2 / 104mV;j 



(a) 



Coupling Invert Bandwidth F ' n n2 e Position Offset li^t 
DC Off Full %° d °™ v -120mdiV 0.000 v Se ^P 



(b) 



Coupling Invert Bandwidth F L n ! n s ^) e Position Offset cl?,^ 
DC Off Full ,Xh! -120mdiv 0.000 v ie ™ p 



Figure 6 Although the two tested dc/dc converters, Brand X (a) and Brand Y (b), are equal in size, have the same basic architecture, 
and have nearly identical published specifications, the magnetic fields above them differ considerably. 



58 EDN | JULY 20, 2006 



Intersil Ambient Light Sensors 



High Performance Analog 





The Best Ambient Light 
Sensors and Their 
Closest Competitor 

With light sensitivity only matched by the human 
eye, Intersil's ISL29001 Light-to-Digital Converter 
provides simple, pure 15-bit PC digital data. 

Drawing less than 300jjA of supply current, the ISL29001 provides 
15-bit effective resolution. This state-of-the art device integrates two 
photodiodes and an ADC into a super small 2.1mm x 2.0mm ODFN 
package. The digital data in standard l 2 C format couldn't be simpler to 
use. It's no wonder EDN Magazine has selected one of this family's 
light sensors as a finalist for this year's Innovation of the Year Award. 



Innovative 2.1mm x 2.0mm 
clear ODFN Package, 




Simple l 2 C standard 
digital output code, 



■ 



) 0111)101!) 1)101091 



Consumes just 300|jA of supply current in normal 
operation. A power-down pin provided which can 
reduce consumption to less that 1|jA. 



Filters out flicker generated 
from artificial light sources. 



Vdd 
-D-- 



PD 
□- 



Integrated 15-bit 
Sigma Delta, 



3 



ISL29001 




/ 




Temperature 
Compensated 
Light Sensor 


50Hz/60Hz 
Rejection 


15-bit 
ADC 




l 2 C Interface 



-□ SDA 

Mi™ 



□ 7 ! 

GND R E xt 

PC output code 
Enables easy adjustment directly proportional 

of resolution from 3 to 15 to lux - no complex 

counts per lux. calculation needed. 

I 






ISL29001 Key Features: 

— PC Interface produces simple PC 
output code, directly proportional 
to lux 

— 0.3 lux to 10,000 lux range 

— 50Hz/60Hz rejection to eliminate 
artificial light flicker 

— Human eye response 

— 15-bit effective resolution 

— Adjustable resolution: 3 to 15 
counts per lux 

— 2.5V to 3.3V supply 

— Temperature compensated 

— 6-pin ODFN (2.1mm x 2mm) 

— Pb-Free plus anneal available 
(RoHS compliant) 



Datasheet, free samples, and 
more information available at 
www.intersil.com 



Inter sil 

HIGH PERFORMANCE ANALOG 



Intersil - Amplify your performance with advanced signal processing. 

©2005 Intersil Americas Inc. All rights reserved. The following are trademarks or services marks owned by Intersil Corporation 
or one of its subsidiaries, and may be registered in the USA and/or other countries: Intersil (and design) and i (and design). 





Figure 7 Whereas both converters, Brand X (a) and Brand Y (b), have similar switching characteristics, a faster sweep reveals that, 
although Brand Y's magnetizing inductance keeps emissions lower overall, the unit's leakage inductance resonates at a higher fre- 
quency and couples greater peak voltage at the switching transient. 



DATA FROM SAMPLES 



Characteristic 


Brand X 


Brand Y 


Switching frequency (kHz) 


420 


250 


Time domain 


Switching field (mV p-p) 


9.5 


2 




Switching field (fitesla p-p) 


14.1 


4.94 




Transient field (mV p-p) 


20 


160 




Transient field (tesla/sec) 


24.7 


197 


Frequency 


Fundamental field (dBm) 


-36 


-48 


domain 


Fundamental field (fitesla) 


3.5 


1.4 




Resonance (MHz) 


20 


9.1 




Resonant field (dBm) 


-56 


-55 




Resonant field (ntesla) 


7 


17.1 



noise originates in the affected instrument or from a noisy 
neighbor whose design did not require the same attention to 
dynamic-range requirements. 

Instrumentation for an open architecture must comply with 
system specifications regardless of whether the instrument in the 
next slot is a highly dynamic power supply or a bank of 200- 
MHz digital-pin drivers. In this environment, every instrument 
must be tested to demonstrate compliance with a field- emission 
profile that imposes the same emission and susceptibility require- 
ments on all instruments. 

MAGNETIC COUPLING 

Near-field, radiated EMI can create noise problems for sen- 
sitive instrumentation. Near fields contain both electric and 
magnetic fields in proportion to the impedance of the source 
(Reference 2). Low-impedance circuits — that is, low relative 
to the 377H impedance of free space, or air — emit predomi- 
nantly magnetic fields, whereas high- impedance circuits emit 
predominantly electric fields. Coupling 
includes capacitive and mutually induc- 
tive coupling depending upon fields pres- 
ent and the configuration of the victim 
circuitry. Because circuit impedances in 
switch-mode power-supply circuits tend 
to be low and electric fields are relative- 




ATEDN.COM 



EE We encourage your comments! 
Go to www.edn.com/ms4199 and click 
on Feedback Loop to post a comment on 
this article. 



Figure 8 A broad look at the spectrum of Brand Y's field shows 
a resonance near 1 MHz with components peaking at 20 to 
25 MHz. 



ly easy to shield, this article focuses on magnetic coupling 
Figure 3). 

Faraday's Law leads to an understanding that the electromo- 
tive force — essentially voltage plus any resistive losses — in a cir- 
cuit is proportional to the rate of change of the magnetic flux 
within the circuit. No voltage is induced if the rate of change 
is zero. Magnetic interference is an ac issue with a higher degree 
of coupling as frequency increases. 
Magnetic flux, <I> M , can be self-induced, as with the product 
of inductance and current, or mutually 
induced, as with the product of flux density 
and loop area (see sidebar "Magnetic cir- 
cuits"). The relationship in the following 
equation is interesting: E= — d<I> M /dt=d(LI)/ 
dt= — d(BAcos6)/dt, where I is current, B is 



(continued on pg 64) 



60 EDN | JULY 20, 2006 



Intersil Real-Time Clocks 

High Performance Analog 



EEPROM 

800nA 

Battery 

Supply 
Current 

System 
Supervisory 




And the Winner is.. 



Intersil's low power l 2 C Real-Time Clocks 
saves costs and board space by integrating 
4k Bytes of E 2 PROM memory AND CPU 
Supervisory Functions. 

Switching to Intersil's ISL12027, ISL12028 and ISL12029 can save 
you money and board space two ways. First, we've integrated 4k of 
E 2 PROM memory, Power On Reset and a Watchdog Timer 
eliminating two external devices. Secondly, we've added crystal 
frequency trimming capability to deliver high accuracy timekeeping 
with a low-cost 32.768kHz crystal. The end result is a highly efficient 
real-time clock you can rely on for >2,000,000 Write Cycles. 



Crystal frequency compensation provides initial crystal 
trimming and subsequent timing correction due to 
temperature variation, saving you money by delivering 
accurate timekeeping with less expensive crystal. 




Basic RTC 



CPU 
Supervisory 



Flash 



Temperature 
Sensor 



Crystal Osc, Network 1 . 


rface 


Oscillator < 
Compensation \ 

u 


'ire Inte 




C\| 


1 

Calendar 


Real-Time Clock 




Integrated Power on Reset 
and Watchdog Timer 
eliminates external devices. 



Two non-volatile alarms 
can be set to the second, 
minute, hour, day of the 
week, day or month. 



Integrated 4k Bytes of 
E 2 PROM memory reliable 
for >2,000,000 write cycles 
eliminates external device. 



800n A General Purpose Real-Time Clock Selector Table 





Int. 
E 2 PROM 
(Bytes) 


Alarm 


CPUS 
POR 


tup.Fx's 
Wdg 
Timer 


IRQ 


Fout 


Vtrip for 
Rest/Bat Switch 


Package 


ISL12026 


512X8 


2 


N 


N 


IRQ/Fout 


5Sel. (2.63V to 4.64V) 


8-Ld SO/TSSOP 


ISL12027 


512X8 


2 


Y 


Y 


RESET 


5Sel. (2.63V to 4.64V) 


8-Ld SO/TSSOP 


ISL12028 


512X8 


2 


Y 


Y 


IRQ/Fout 


5Sel. (2.63V to 4.64V) 


14-Ld SO/TSSOP 


ISL12029 


512X8 


2 


Y 


Y 


IRQ/Fout 


5Sel. (2.63V to 4.64V) 


14-Ld SO/TSSOP 



For datasheet, free 
samples, and complete 
line of general purpose 
Real-Time Clocks go to 
www.intersil.com ["^ 



inter sil 

HIGH PERFORMANCE ANALOG 



Intersil - Amplify your performance with advanced signal processing. 

©2006 Intersil Americas Inc. All rights reserved. The following are trademarks or services marks owned by Intersil Corporation 
or one of its subsidiaries, and may be registered in the USA and/or other countries: Intersil (and design) and i (and design). 




MAKING YOUR OWN MAGNETIC-FIELD-MEASUREMENT PROBE 



A high-bandwidth amplifi- 
er provides approximately 
20 dB of gain to a signal 
that a small magnetic 
loop produces (Figure A). 
You can observe the 
probe output on a spec- 
trum analyzer or an oscil- 
loscope depending upon 
the application require- 
ments. Many ac-source or 
-measurement instru- 



ments need to describe 
performance in terms of 
SFDR (spurious-free 
dynamic range) and 
would tend toward spec- 
tral data. However, dc 
instrumentation may be 
more concerned with total 
rms noise energy and 
would examine field 
measurements in the 
time domain. These com- 



ponent measurements 
look at both. 

Figures B and C show 
the layout of the amplifier 
and probe tip. The probe 
tip provides a circular 
area with 0.4 in. diameter 
perpendicular to the cir- 
cuitry on the pc board. An 
additional design consid- 
eration is to provide a 
balanced input to cancel 



any electric fields cou- 
pling to the probe tip. 

This circuit uses high- 
bandwidth current-feed- 
back op amps because the 
dc/dc converters that are 
most interesting for instru- 
mentation development 
have resonant compo- 
nents of 25 to 60 MHz. 




62 EDN | JULY 20, 2006 



Intersil Battery Charger ICs 



Intersil High Performance Analog 





Unshackle Your 
Handheld Device 

Intersil's ISL6299A is a fully integrated low-cost 
Li-ion or Li-polymer battery charger that accepts 
both USB port and desktop cradle charger. 

The ISL6299A is a low component count solution that features 
programmable cradle charge current, charge indication, adapter present 
indication, and programmable end-of-charge (EOC) current with latch, 
All these advanced features, along with Intersil's Thermaguard™ 
technology for an added measure of thermal protection, are delivered in 
a single 3x3 mm DFN package. 



ISL6299A System 




Cradle input. The max input voltage tolerance is 28V. Programmable 
charge current up to 1Aand programmable end of charge current. The 
included end of charge latch is the default input source. 



USB input. Takes input from USB port or other low voltage supply. Fixed 
charge current at typically 380mA. Only charges when cradle source is 
not connected. 



Programmable end-of-charge optimizes 
end-customer applications. High input 
voltage tolerance protects the device when 
used with low cost unregulated supplies or 
in under input transient conditions. 
/ 



Fast-charging rates of an AC 
adaptor for when you have 
access to cradle. 



28V tolerant cradle with 
overvoltage protection. 




Sync-up and fuel-up directly from your 
laptop with convenient USB charger. 



ISL6299A Key Features: 

— Dual-input charger for single-cell li-ion/ 
polymer batteries for cradle and USB 

— Low component count 

— Integrated pass element 

- — Fixed 380mA USB charge current 

— Programmable cradle charge current 

— Charge current Thermaguard™ for 
thermal protection 

28V maximum voltage for the cradle input 

— Charge and adapter presence indicators 

Less than O.SjjA leakage current off the 
battery when no input power attached 

— Programmable end-of-charge current with 
latch for cradle input 

— - No external blocking diode required 

— Pb-Free plus anneal available 
(RoHS compliant) 



Datasheet, eval kit with USB 
interface, free samples, and 
more information available at 
www.intersil.com 



Intersil- Switching Regulators for precise power delivery. 

©2005 Intersil Americas Inc. All rights reserved. The following are trademarks or services marks owned by Intersil Corporation 
or one of its subsidiaries, and may be registered in the USA and/or other countries: Intersil (and design) and i (and design). 




inter s l 

HIGH PERFORMANCE ANALOG 



magnetioflux density, and L is inductance. The equation says 
that you can induce an error voltage into a circuit by changing 
any one or more of the parameters- A given percentage change 
in current, magnetic field, or inductance (loop area) produces 
the same effect on induced voltage. Therefore, the design prac- 
tice of reducing loop areas in high-performance circuits to elim- 



inate errors from conducted emissions also reduces errors from 
magnetic coupling. 

Although high-performance design practice dictates that you 
minimize loop area and shield necessarily susceptible compo- 
nents, such as filter inductors, it's always better to stop noise 
emissions at their source. Toward that end, instrument design- 



IGNORE RINGING AND OVERSHOOT 



1 mV P-P 



18.5 ijlTESLA P-P 




1.5-|xSEC PULSE 
3-|xSEC PERIOD 



3-jjlSEC PERIOD 



CONVERTING VOLTAGE MEASUREMENTS TO MAGNETIC- FIELD DATA 

An instrument designer 
characterizing various 
sources of magnetic inter- 
ference might find satis- 
faction with the relative- 
voltage measurements 
that a standard loop pro- 
duces-assuming that the 
loop represents the loop 
area and orientation that 
an instrument might expe- 
rience. But, because the 
loops and amplification 
can differ, it is helpful to 
convert these voltage 
measurements into field 
data. 

Current in the emitting 
circuit creates magnetic 
flux that cuts through the 
test loop. The test loop is 
held stationary, including 
its angle to the field, 6, but 
the flux density, B, is 
changing to induce a volt- 



This typical time-domain measurement converted to the B-field is a 3-|jLsec, 50%-duty- 
cycle switching waveform. The 5-mV peak measurement equates to a 1 2.3-tesla/sec rate of 
change in flux density. 



a 9 e: I V measuredI K a A l 
cosOdB/dt, where K A is the 

gain of the amplifier, A L is 
the area of the loop in 
square meters, dB/dt is 
the rate of change of the 
flux density in webers per 
square meter, or teslas. 
Plugging in the values and 
noting that the termina- 
tion into the spectrum 
analyzer reduces the gain 
by a factor of two yields: 
|dB/dt|cos9=2467X 
Measured (teslas). 

Consider a reading of 10 
mV p-p for the switching 
component in Figure A. 
Ignore the peak deviations 
at the switch transients 
because they do not add 
appreciably to the rms 



energy. This example has a 
3-jxsec, 50%-duty-cycle 
switching waveform. The 
5-mV peak measurement 
equates to a 12.3-tesla/ 
sec rate of change in flux 
density. Given that this 
rate remains 1.5 jxsec, the 
flux density (B-field) in the 
direction of the pickup 
loop is 18.5 [xtesla p-p. 

You measure the mag- 
netizing force, or H-field, 
in amps per meter, and 
you can determine it from 
the B-field by dividing by 
the permeability of free 
space, or 4ttX10" 7 . The 37- 
|xtesla-p-p flux density is 
equivalent to 29.4A/m in 
an air-core circuit. 

A spectrum analyzer can 
provide an alternative view 
of noise coupling. You can 
examine the issues of 
ringing and resonance. 
Reference A provides a 
derivation that takes 
advantage of a sinusoidal 
B-field: V N (o))=o)K A A L B R 



(a))cosO, where V N and B R 
are rms quantities at the 
frequency of interest, K A is 
the amplifier gain, A L is 
the loop area, and 6 is the 
angle between the field 
vector and the area per- 
pendicular to the loop 
area. Plugging in the pre- 
viously determined values 
yields: B R cos0=393 
[V N (f)/f] 2. For general 



application, you can con- 
vert this formula into a 
chart (Figure B). 

REFERENCE 

Ott, Henry W, Noise 
Reduction Techniques in 
Electronic Systems, 
Second Edition, pg 38, 
John Wiley & Sons, 1988. 



TESLA/V (dB) 



20 


-20 
-40 
-60 
-80 
-100 
-120 



-KBrf 



-i — i — i — i — i — i — i — i — i— 



i — i — i — i — i — i — i — i— 

^ ^ £ 



FREQUENCY 

This chart shows the field-conversion factors for the 
magnetic probe. 



64 EDN | JULY 20, 2006 



Intersil Switching Regulators 



High Performance Analog 




Need a Multiple 
Output PWM that 
can Tackle a Wide 
Range of Voltages? 

Now you can get true 180° Out-of-Phase PWM 
performance along with your choice of two or 
three regulated outputs. 

Intersil's new line of wide V !N PWM Controllers offer industry leading 
performance and protection, along with unmatched design flexibility. 
So, no matter what your input voltage, switching frequency, or number 
of system supply voltage requirements are, we've got the right PWM 
Controller IC for your design. 





Triple Output 
PWM Controller 

4.5V to 5.5V or 
5.6V to 24V 
Input Voltage 



Synchronized 180° out of phase reducing 
the RMS input current and ripple voltage. 



Triple Output 
PWM Controller 

4.5V to 5.5V or 
5.6V to 24V 
Input Voltage 



V 0UT1 : Adjustable, 0.8V to V| N 



V 0UT2 : Adjustable, 0.8V to V iN 
V 0UT3 : Adjustable, 0.8V to V, N 




Vquti: Adjustable, 0.8V to V w 



V 0U T2 : Adjustable, 0.8V to V, r 



V 0UT3 : Adjustable, 0.8V to V, N 



An adjustable overcurrent protection circuit 
monitors the output current by sensing the 
voltage drop across the lower MOSFET. 



Dual Output 
PWM Controller 

4.5V to 5.5V or _ 
5.6V to 24V 
Input Voltage 




V ut2 : Adjustable, 0.8V to V !N 



V ut3 : Adjustable, 0.8V to V )N 



Key Features: 

Operates from wide range of input supplies 
(4.5V to 24V) 

^ 1 .4MHz switching frequency (ISL6441 , 
ISL6445) for smaller passive 
components or 300kHz switching frequency 
(ISL6440, ISL6443) for highest efficiency. 
ISL64442 switching frequency is adjustable 
from 300kHz to 2.5MHz. 

^ Dual (ISL6440, ISL6445) and Triple (ISL6441, 
ISL64442 ISL6443) regulated outputs 

<— Internal compensation replaces external 
components freeing-up valuable board space 

^— Over current, over voltage, Pgood and 
thermal shutdown 

~- Out of phase operation to reduce input filter 
requirements and EMI 

Small footprint and excellent thermal 
resistance in 5x5 QFN package (ISL6441, 
ISL6443) and 20-ld QSOP (ISL6440, 
ISL64442, ISL6445) 



Datasheet, free samples, and 
more information available at 
www.intersil.com 



Intersil- Switching Regulators for precise power delivery. 



•..All rights reserved. The following are trademarks o 
ind may be registered in the USA and/or other count 



marks owned by Intersil Corporatio 
il (and design) and i (and design). 




Intefsil 

HIGH PERFORMANCE ANALOG 



ers would like to compare near-field performance in the time 
and the frequency domains before they select power convert- 
ers for use in instruments- Magnetic-field specifications are not 
yet at this level of maturity, however, so device characterization 
is necessary. 

MEASUREMENT EXAMPLE 

For example, two similarly specified dc/dc converters have 
been characterized for magnetic-field emissions with a small loop 
antenna. Both converters are one-eighth-brick, wide-input- 



range devices using the same input voltage, 48V; output volt- 
age, 5V; and load resistance, 411. Both share the same conver- 
sion architecture — a fixed-ratio isolation stage following a reg- 
ulation stage to support a 35 to 75V input range. These con- 
verters have two power magnetic sections within the design, but 
both run at the same frequency. Neither converter provides mag- 
netic-emission data within the specification sheet. 

In this characterization setup (Figure 4), a small pickup loop 
senses magnetic fields in the area above the dc/dc converters 
(see sidebar "Making your own magnetic-field-measurement 



MAGNETIC CIRCUITS 



Electrical engineers ap- 
pear to be most comfort- 
able working with circuits 
in which ideal conductors 
make signal connections. 
Inductors are OK for help- 
ing with frequency- 
domain issues, such as fil- 
tering, but there is a ten- 
dency to ignore the mag- 
netic component. 

Do not fear a magnetic 
circuit. Observing the simi- 
larities between inductors 
and capacitors is helpful in 
developing an understand- 
ing of the circuit operation 
(figures a and b and Refer- 
ence A). The intensity of the 
electric field between the 
plates of a capacitor de- 
pends only on the voltage 
and the physical distance, 
d, between the plates: 
E=V/d in volts per meter. 

The intensity of the mag- 
netic field surrounding a 
conductor depends only on 
the current and the physical 



width of the conductor, w: 
H=l/w in amps per meter. 
The magnetic-field strength 
is sometimes called the 
magnetizing force. 

Capacitance is a func- 
tion of the plate area, the 
distance between the 
plates, and the dielectric 
material between the 
plates. The capacitance is 
C=(ewl)/d. The dielectric 
constant has units of 
farads per meter. A high 
dielectric constant pro- 
duces more capacitance 
in a given plate area, 
holding plate separation 
constant, than a low 
dielectric constant. 

A conductor forms a 
loop, creating an inductor. 
The inductance is a func- 
tion of the area of the loop, 
the width of the conductor, 
and the permeability of the 
material surrounding the 
conductor: L=(|judl)/w. The 
core's permeability has 



units of henries per meter. 
Similar to the capacitor, 
high permeability produces 
more inductance in a given 
loop area, holding conduc- 
tor width constant, than a 
material with low perme- 
ability. 

In a capacitor, flux is a 
measure of the stored 
charge in coulombs. As 
the capacitor discharges, 
this charge becomes the 
source of current. Electric 
flux in a capacitor is a 
function of capacitance 
and voltage: <E>=CV. 

Magnetic flux in an 
inductor is analogous to 
the electric charge stored 
in a capacitor. Magnetic 
flux has units of webers 
and becomes the source 
of electromotive force 
(open-circuit voltage) as 
the inductor discharges. 
Magnetic flux is a function 
of the inductance and volt- 
age: OM=LI. 



The dielectric that influ- 
ences capacitance per unit 
also impacts flux density- 
or charge per unit area. 
Imagine flux lines between 
the positive and negative 
charges on the plate of the 
capacitor. The number of 
lines passing through a 
unit of area represents the 
flux density: D=<I> /(wl)= 
eE. The flux density is 
directly proportional to the 
dielectric constant of the 
material between the 
capacitor plates. 

The permeability of the 
core influences inductance 
and therefore magnetic- 
flux density. You measure 
flux density in flux per unit 
area:B=<S>M/(dl)=|xH 



REFERENCE 

Walker, Charles S, 
Capacitance, Inductance 
and Crosstalk Analysis, 
Artech House, 1990. 




DIELECTRIC CONSTANT (e) 




PREMEABILITY (jjl) 



The electric field between the plates of a capacitor depends on the voltage and the distance between the plates (a). The induc- 
ance is a function of the area of the loop, the width of the conductor, and the permeability of the material surrounding the conductor (b). 



66 EDN | JULY 20, 2006 



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probe") - The amplified-loop output con- 
nects to an oscilloscope and a spectrum 
analyzer. The magnetic emission of the 
dc/dc converters contains a broad band 
of energy from the fundamental switch- 
ing frequency that reaches to 50 MHz or 
more. It is important to treat the meas- 
ured signal's distribution network as a 
high-frequency transmission line. The 
signal runs past the high- impedance 
oscilloscope input with a BNC tee at the 
scope input. The line terminates at the 
spectrum- analyzer input. 

To best represent a victim circuit in a 
neighboring slot, orient the probe tip in 
a plane parallel to the converter's pc- 
board substrate. Scan the surface of 
the board for maximum output; the 
strongest field is above the isolation 
transformer (second stage). The intent of 
the measurements, which take place 
about 0.65 in. above the top surface of the 
transformer, is to place the pickup loop 
1 in. above the plane that would repre- 
sent the surface of the motherboard if you 
mounted the converter in an appropriate 
through-hole design (Figure 5). 

Viewing measurement results in the 
time domain, you can see the converter's 
fundamental frequency and ringing fre- 
quency, and you can get a sense of the 
magnetic-field intensity (Figure 6). 
These converters demonstrate a trade-off 
in the converter's magnetic design. The 
isolation transformer's leakage and mag- 
netizing inductance mutually couples to 
the measurement probe. Brand X has a 
significantly lower magnetizing induc- 
tance in its isolation transformer, as the 
higher fundamental field in the meas- 
urement shows. Brand Y has lower leak- 
age inductance and therefore higher ring- 
ing frequency. The ringing that occurs 
around the switching transient is the 
result of leakage inductance and the 
switch's parasitic capacitance. 

You can make two observations based 
on the derivative relationship of the ear- 
lier equation: A square-wave response 
means that the magnetic flux is chang- 
ing linearly. The magnetic component 
is operating in a linear region, and cur- 
rent is increasing linearly. In broad 
terms, the magnetic field for Brand X is 
an 18-jJitesla p-p triangular wave (see 
sidebar "Converting voltage measure- 
ments to magnetic-field data"). 



Although lower leakage inductance is 
better for reduced emission, the higher 
frequency resonance couples greater 
peak voltage at the higher frequency 
(Figure 7). A closer observation of the 
switching transient provides some 
insight into the resonance within the 
dc/dc converter. 

If your main concern is for spectral 
interference in an ac-source or -capture 
instrument, you may be more interested 
in the information the spectrum analyz- 
er provides. Taking a broad look at Brand 
Y's magnetic-field spectrum, you can see 
the resonance near 10 MHz and the com- 
ponents peaking at 20 to 25 MHz (Fig^ 
ure 8). Table 1 summarizes the data from 
these samples. 

Open- instrumentation architectures 
offer an important role for dc/dc con- 
verters. If the converters are not the 
sources of performance-limiting noise, 
they open a platform to a large set of 
applications. This article examines two 
similar converters using a high-band- 
width magnetic probe and finds different 
results. Because a system is only as quiet 
as its noisiest neighbor, anyone wishing 
to participate in open- instrument devel- 
opment should carefully evaluate to 
ensure a performance-compatible envi- 
ronment. H3N 

AUTHOR'S BIOGRAPHY 

William Bowhers teaches undergraduate 
electrical engineering at Merrimack College 
(North Andover, MA) . His research follows 
a general interest in measurement technolo- 
gy that he acquired during 25 years of instru- 
mentation development at Teradyne Inc 
(Boston). Bowhers received a masters 
degree in electrical engineering from Boston 
University (Boston) and a bachelors degree 
in electrical engineering from Villanova Uni- 
versity (Villanova, PA) .He is a member of 
the IEEE and the American Society for Engi- 
neering Education. 

REFERENCES 

m Perez, Sergio M, "The Critical Need 
for Open ATE Architecture," Proceed- 
ings of the International Test Confer- 
ence, pg 1409, 2004. 
3 Ott, Henry W, Noise Reduction 
Techniques in Electronic Systems, Sec- 
ond Edition, pg 1 59, John Wiley & 
Sons, 1988. 




Special Advertising Section 



Rarely Asked Questions 





Z-A 

15 simple! 



It may be Greek to you, but sigma delta 
converters are not really hard to understand. 

Q. Can you please explain, simply, as to a Bear of 
Little Brain 1 , how sigma-delta converters work? 

A. By over-sampling, noise 
shaping and digital filtering. 

Athens is a beautiful city, with 
the ambiance of many millennia of 
history. I was walking round the 
Acropolis with Spiros, one of our 
Greek distributors, when he asked 
me how sigma-delta (S-A) convert- 
ers work. "Sigma and delta are 
letters of our Greek alphabet," he 
exclaimed, "but every article I have 
seen about their operation is dou- 
ble dutch 2 to me. They all start with several 
pages of partial differential equations and 
then go downhill from there." 

If a voltage is measured many times, the 
average of the measurements will be more 
accurate than most individual measure- 
ments. This is "over-sampling." (Dither 3 may 
be necessary to randomize the errors in the 
individual measurements.) 

There is a definite theoretical minimum 
limit to the possible noise of an analog-to- 
digital converter (ADC). When an ADC sam- 
ples a signal at a frequency of f s the digital 
output contains the signal and this "quanti- 
zation noise" is usually spread evenly from 
dc to f s /2. By sampling at a higher rate of 
Kf s , the noise is spread over the wider band 
from dc to Kf s /2. If we then remove all the 
noise above f s /2 with a digital filter the sig- 
nal-to-noise ratio (SNR) of the digital output 
is improved — effectively improving the 
ADC resolution. 

Normally the SNR increases with the 
square root of K, so very high sampling 
rates are necessary for useful increases in 
SNR. But a E=A modulator does not pro- 
duce uniformly distributed quantization 
noise. Although the total noise is unaltered 
in a Z-A system, most of it is at high fre- 



quencies (HF). This is known as noise shap- 
ing and permits much lower values of K. 

If the digital output from the I -A modula- 
tor is filtered to remove HF, leaving the 
frequencies from dc to f s /2 (where the 
wanted signals are) then the SNR and reso- 
lution of the digital output are improved. 
A I-A ADC simply consists of a S-A modu- 
lator and a digital low-pass filter, both of 
which are easily made with modern high- 
density digital technology. The principle of 
Z-A ADCs has been known for more than 
40 years, but the ability to build one on a 
chip is relatively recent. 



7 "When you are a Bear of Very Little Brain and you think of 
Things, you find sometimes that a Thing which seemed very 
Thingish inside you is quite different when it gets out into 
the open and has other people looking at it. " — AA Milne, 
"The House at Pooh Corner" 

2 Double dutch means gobbledygook 

3 Dither — the addition of noise or some other AC signal 
in order to randomize errors. 



I 



To learn more about 
sigma delta converters, 
Go to: http://rbi.ims.ca/4928-696 



1 




Contributing Writer 
James Bryant has 
been a European 
Applications Manager 
with Analog Devices 
since 1982. He holds a 
degree in Physics and 
Philosophy from the 
University of Leeds. He 
is also C.Eng., 
Eur.Eng., MIEE, and an 
FBIS. In addition to 
his passion for engi- 
neering, James is a 
radio ham and holds 
the call sign G4CLF. 



Have a question 
involving a 
perplexing or 
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problem? Submit 
your question to: 

raq@reedbusiness.com 
SPONSORED BY 

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JULY 20, 2006 I EDN 69 




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PCI Express: 
Ever-faster graphics pipe 
serves many masters 



THE NEW PCI EXPRESS SPEC SIGNIFICANTLY IMPROVES 
DESKTOP-PC GRAPHICS. DEVELOPERS ARE NOW 
WORKING ON GENERATION 2, WHICH WILL FURTHER 
EXPAND THE GRAPHICS PIPE. 



The new PCI (Peripheral Component Intercom 
nect) Express spec provides the biggest improve- 
ment in more than a decade in I/O performance 
for computation systems, significantly improving 
graphics in desktop PCs and workstations- Intel 
initially launched the spec in its chip sets in mid- 
2004, and the technology has become mainstream in high-end 
systems- But PCI Express is far more than an avenue to better 
games or video- As have many other PC innovations, PCI 
Express will enable significant applications, such as medical 
imaging, and serve in industrial control and many other embed- 
ded-system roles. 

Serial PCI Express is usurping the parallel AGP (accelerat- 
ed graphics port) in graphics as just one part of a broad indus- 
try trend toward serialization. For example, USB replaced the 
parallel and serial ports, and SATA and SAS (serial attached 
SCSI) are replacing parallel ATA and SCSI in storage inter- 
faces. And, like parallel PCI, PCI Express will handle far more 
than graphics, providing a flexible and scalable data highway 
for all types of performance-centric add-on functions. 

You might ask whether a replacement for PCI-derived AGP 
is necessary. AGP8 X pushed the evolutionary limits of what was 
possible with a parallel bus — at least at a price point sustain- 
able for volume PC production. Clock skew was the problem 
plaguing AGP, like other parallel buses touting higher per- 
formance. A single clock defines the data-valid period across 
AGP's 32 data lanes. But the faster the clock runs, the narrower 
the data-valid window becomes, and the tougher the design 
challenge becomes (see sidebar "History of the graphics pipe"). 

So, the graphics pipeline became serialized with PCI Express. 
This serialization means that data carries with it an embedded 
clock, which a PLL recovers in the receiver circuits. Multiple 
lanes can carry data in parallel, providing scalable performance, 
but each lane has its own embedded clock (Figure 1). At the 
receiver end, the data resynchronizes. PCI Express can tolerate 
as much as four symbols of skew between lanes, dramatically eas- 
ing the constraints for motherboard and graphics-controller 
design. 

PCI Express is more than just the follow-on to AGP. PCI 



Express is also the migration point for applications currently on 
conventional PCI and PCI-X as they move to higher speeds and 
performance. These legacy buses will not go away overnight, but, 
like ISA (Industry Standard Bus), they eventually will. PCI 
Express reunites the forks that broke away from the original PCI 
with a common protocol and electrical interface. Moreover, PCI 
Express technology will make its way to the embedded-system 
world in CompactPCI implementations. 

For graphics implementations, the PCI Express bus comprises 
16 lane pairs. Each lane pair has four data wires — a transmit- 
ting differential pair and a receiving differential pair. Because 
PCI Express is dual-simplex, data can flow in both directions 
unimpeded by data going the other direction, unlike AGP 
(Figure 2). AGP was point-to-point like PCI Express, but AGP 



BYTE 5 



BYTE 4 



BYTE 3 



BYTE 2 



BYTE 1 



BYTEO 

~~r- 



BYTE STREAM 
(CONCEPTUAL) 



BYTE 5 



BYTE4 



BYTE 3 



BYTE 2 



BYTE 1 



BYTEO 



BYTE 3 



BYTE 2 



BYTE 1 



BYTEO 



8B/10B 



P>S 











\ x 






BYTE 4 




BYTE 5 




BYTE 6 




BYTE 7 


BYTEO 




BYTE 1 




BYTE 2 




BYTE 3 


1 




t 




♦ 




♦ 


8B/10B 




8B/10B 




8B/10B 




8B/10B 


P>S 


h 


P>S 


1 


P>S 


1 


P>S 











LANEO 



LANEO 



LANE 1 



LANE 2 



LANE 3 



Figure 1 The PCI Express offers scalability through the concept 
of lanes. Designers can linearly extend bandwidth by adding 
lanes. In a one-lane system, such as Lane 0, the data bytes flow 
sequentially as expected. In a multilane scenario, the bytes are 
interleaved across the lanes for transmission. 



JULY 20, 2006 | EDN 71 



is full-duplex: Data can flow in only one direction at a time. 
Furthermore, AGP never offered symmetric bandwidth in its 
implementations, even though nothing about the AGP pro- 
tocols precludes symmetry. AGP8X achieves 2.1-Gbyte/sec 
peaks in data flows from the host CPU to graphics controllers, 
which is the primary direction for graphics traffic. However, 
in typical system implementations, the real available "back- 
channel" bandwidth is about one-tenth of that figure. In con- 
trast, PCI Express graphics offers 4-Gbyte/sec peak bandwidth 
simultaneously in both directions and, in typical implement 
tations, delivers the bulk of that bandwidth in both directions. 
This highly symmetric bandwidth leads to some interesting new 
capabilities for graphics based on PCI Express and in many 
other I/O applications. 

AGP implementations yielded weak back-channel bandwidth 
for several reasons. To achieve the best CPU-tographics con- 
troller performance, AGP worked from uncached address spaces 
(the AGP "aperture"). For reads, this assumption makes perfect 
sense, because caching requires snooping, degrading perform- 
ance. However, chip-set designers simply did not optimize their 
chip sets for large data-set writes to this space from the graph- 
ics controller because the cost of providing a large number of 
write-posting buffers was prohibitive. This trade-off made sense 



IN THE DEFINITION OF PCI 
EXPRESS, THE GRAPHICS 
INDUSTRY WAS UNANIMOUS 
IN THE OPINION THAT IT DIDN'T 
WANT SIMILAR "HELP" IN THE 
NEW I/O INTERFACE. 



to the chip-set architects, because graphics traffic is primarily 
in the forward direction. 

A second reason for the relative weakness of AGP's back- 
channel bandwidth was a limitation in the GART (graphics- 
address-remapping-table) memory-management system that 
AGP provided to assist in the graphics controller's task of man- 
aging physical- and virtual-address translations for access to 
uncachable system-memory space. Again, the theory sounded 
great, but practical design considerations led to suboptimal 
graphics performance, because real chip sets never implement- 
ed enough TLBs (translation- look- aside buffers). Each 4 kbytes 
of memory requires a new TLB because 4 kbytes is the default 
page size in Windows. But even two dozen TLBs support only 
about 100 kbytes of memory before the onset of TLB "thrash." 



HISTORY OF THE GRAPHICS PIPE 



The demands of graphics 
were the primary driving 
force behind the PCI 
(Peripheral Component 
Interconnect) bus. The 
developers of the original 
ISA (Industry Standard 
Bus) based it on the PC 
AT's Intel 286 processor 
bus, which debuted in 
1984. ISA delivered only 
16 Mbytes/sec at 8 MHz, 
and was woefully inade- 
quate for the fire hose of 
data that 3-D graphics 
requires. The VESA (Video 
Electronics Standards 
Association) developed 
the VL (Video Local) Bus 
as a proposed alternative 
to ISA. EISA (Extended 
ISA) was another. The VL 
Bus designers were clever 
in getting more than 100- 
M byte/sec bandwidth 
from the CPU to the graph- 
ics controller. However, the 
bus worked only on graph- 
ics because it did not sup- 
port multiple devices. 



Furthermore, it tied only to 
a specific processor's bus 
and, thus, could not adapt 
to future technologies. 
These facts explain why 
PCI, with its 133-Mbyte/ 
sec bandwidth, triumphed 
over a 32-bit, shared, "mul- 
tidrop" bus. Intel in 1991 
proposed PCI as a scala- 
ble replacement for ISA 
and helped form the PCI- 
SIG (special-interest 
group), which in 1993 
released the first specifi- 
cation. 

You'd think the graphics 
industry would happily 
chew on this order-of- 
magnitude increase in 
bandwidth for a while, but 
that scenario didn't occur. 
During that era, Microsoft 
(www. m i crosof t. co m) 
moved from DOS to 
Windows, causing a dis- 
continuity in demand for 3- 
D-graphics capabilities in 
PCs. Intel in 1997-only 
three years after PCI 



entered production-intro- 
duced its Pentium II 
processor with the AGP 
(accelerated-graphics 
port). AGP borrows heavily 
from PCI technology. AGP 
is also 32 bits wide, and its 
protocols build on top of 
PCI protocols. But AGP is 
a nonshared, point-to- 
point bus. It uses a differ- 
ent connector from the 
one that PCI uses. And, 
although PCs would com- 
monly have four to six PCI 
slots, they would have only 
one AGP slot. 

AGP went through many 
speed bumps to achieve 
2.1 G bytes/sec in its 
AGP8X version, which its 
developers released in 
2002, a remarkable evolu- 
tion from its roots in PCI. 
You'd think the graphics 
community would be 
happy now, having fat- 
tened the pipe nearly three 
orders of magnitude in 
only two decades. 



However, graphics vendors 
believed they'd be taxing 
this bandwidth within a 
few short years. 

PCI Express began life 
as 3GIO (third-generation 
I/O) in the Arapahoe Work 
Group but moved quickly 
to become a specification 
that the PCI-SIG owned. 
That group in July 2002 
released the 1 .0 Version. 
First desktop, workstation, 
and server products from 
Intel went into production 
mid-2004, and the first 
chip sets for notebooks 
debuted early in 2005. 
Now, a range of PCI 
Express products are avail- 
able in many categories of 
devices (Reference A). 

REFERENCE 

El Intel Developer 

Network for PCI Express 

Architecture, www. 

pciexpressdevnet.org/ 

kshowcase. 



r 



72 EDN | JULY 20, 2006 



MAKE SURE TO CHECK THE EXPIRATION DATE 

ON THE LANGUAGE YOU PLAN TO USE. 




INTEGRATED SYSTEM DESIGN + DESIGN FOR MANUFACTURING + ELECTRONIC SYSTEM LEVEL DESIGN + FUNCTIONAL VERIFICATION 



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a loaf of bread. Buy into a verification tool using a single-vendor language like Vera or 




"e" and you're in for trouble. Questa 7 / Mentor Graphics' advanced functional verification 
platform, is the industry's most comprehensive solution, and offers you all of the new, 
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THE EDA TECHNOLOGY LEADER 


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©2006 Mentor Graphics Corporation. All Rights Reserved. Mentor Graphics is a registered trademark of Mentor Graphics Corporation. 





A cache thrashes when its miss rate is too high, and it spends 
most of its time servicing misses- Thrashing, particularly virtu- 
al-memory thrashing, is bad for performance, because the rel- 
ative cost of a miss is so high: It may slow a machine down by 
a factor 100 or more. 

In the definition of PCI Express, the graphics industry was 
unanimous in the opinion that it didn't want similar "help" in 
the new I/O interface- With PCI Express graphics, all memory 
management occurs within the graphics controller. Memory- 
management performance is under the control of the graphics 
vendors, who are more economically motivated in general than 
are chip-set vendors to spend gates on graphics performance. 

At this point, it is reasonable to ask why continually increas- 
ing the bandwidth of the pipe from the host CPU to the graph- 
ics controller is so important. More prosaically, an end user may 
reasonably want to know what he can do with a notebook, desk- 
top PC, or workstation with PCI Express graphics that is not 
possible with AGP8X or, for that matter, what PCI Express 
offers in embedded-system roles. Only a few of today's applica- 
tions are starting to top the limits of what AGP8 X can deliv- 
er. It is not difficult to create a demo application that uses the 
full bandwidth of PCI Express, and the suppliers of graphics con- 
trollers use this approach to show off their latest products. But 
broadly available commercial applications rarely show any 
advantage just from the fatter pipe when the pipe enters. 

The PC world still needs PCI Express graphics, and end users 
have good reasons for desiring them. To understand this con- 
cept, consider the perspective of a developer of graphics- inten- 
sive software, such as that for video games or CAD. These devel- 
opers write their programs to the capabilities of the least-com- 
mon-denominator hardware in their target customer base. For 
leading-edge video games and high-end-workstation applica- 
tions, these hardware units are highly capable, recently intro- 
duced systems, but more generally the target is likely to be sys- 
tems the vendors released over the last two to four years. 

The only way to get the software community to continuous- 
ly raise the bar in graphics capabilities is by continuously increas- 
ing the capabilities, including bandwidth, of the client plat- 
forms. The impact of AGP8X on software development is hap- 
pening now. The work to bring PCI Express to market will have 
its major impact on software applications in the future. 

But the end user still has plenty of incentive to purchase PCI 
Express graphics today. A buyer of PCI Express graphics is well- 
prepared for the getting the most from the new applications that 
emerge over the life of that PC. And, second, the suppliers of 



PACKET ■ 



CLOCK • 



DEVICE 
A 



SELECTABLE 
WIDTH 



DEVICE 
B 



PACKET 



Figure 2 PCI Express implements a full-duplex link in which traffic flows symmetri 
cally and simultaneously in each direction over serial links with the clock embed- 
ded in the data. 



THE ONLY WAY TO GET THE SOFT- 
WARE COMMUNITY TO CONTINU- 
OUSLY RAISE THE BAR IN GRAPH- 
ICS CAPABILITIES IS BY CONTINU- 
OUSLY INCREASING THE CAPABIL- 
ITIES, INCLUDING BANDWIDTH, 
OF THE CLIENT PLATFORMS. 



graphics controllers are focusing their latest developments on 
PCI Express products. So, the client with PCI Express graph- 
ics will likely significantly outperform previous generations of 
products, even if PCI Express cannot, in general, now take cred- 
it for that performance advantage. 

The performance advantages of PCI Express graphics may 
emerge more quickly than with previous transitions because of 
the tremendous increase of CPU performance and memory 
bandwidth just coming to market. For example, the latest Intel 
workstation platform exploits as much as 64 Gbytes of fully 
buffered DIMM with a peak bandwidth of 21 Gbytes/sec. Con- 
join those features with additional capabilities in the most re- 
cent graphics controllers, and you can more fully exploit the bus. 

PCI Express affords system designers an extremely broad range 
of capabilities. In the graphics world, PCI Express dual-graph- 
ics controllers are popular with gamers. Some designers are even 
contemplating externally cabled PCI Express subsystems (see 
sidebar "Express outside the box" and the online sidebar "Dual 
controllers accelerate rendering" at www.edn.com/ms4201). 

REAL-WORLD ADVANTAGES 

PCI Express is a key enabler in some lifesaving applications. 
For example, consider Vital Images (www.vitalimages.com), 
a leading provider of enterprisewide advanced visualization 
and analysis software for use in disease-screening appli- 
cations, clinical diagnosis, and therapy planning. The compa- 
ny's technology gives radiologists, cardiologists, oncologists, and 
other medical specialists timesaving productivity and commu- 
nications tools for easy use in the day-to-day practice of med- 
icine. Vital Images' software products include a medical-diag- 
nostic tool that allows physicians to use PCs or notebook com- 
puters to gain remote access to 2-, 3-, and 4-D advanced visu- 
alization. The software enables users to measure, rotate, ana- 
lyze, and segment images. 

One technical challenge for this medical 
application stems from the size of data sets that 
t volumetric visualization requires. According to 

' Karel Zuiderveld, PhD, director of technology 

research at Vital Images, "PCI Express is espe- 
cially beneficial when dealing with large data 
sets that do not fit into graphics memory. The 
size of modern medical data sets, [which the 
company obtained using computer-tomogra- 
phy], range from hundreds of megabytes to sev- 
eral gigabytes. In addition to a vast amount of 
CPU and GPU [graphics-processing-unit] 
resources, fast rendering of such data sets also 



CLOCK 



74 EDN | JULY 20, 2006 



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requires high transfer speeds to the GPU." With PCI Express 
graphics, medical professionals can view 3-D images from alter- 
native perspectives with reasonable response times. 

In the past, the graphics bus has not been the bottleneck. 
When uploading textures to OpenGL, the driver usually "swiz- 
zles" the texture — that is, swaps the pixels around so that they 
are stored in the same way as the original format. It then cre- 
ates a copy in system memory, according to the OpenGL spec, 
and writes a copy to the graphics memory. Until recently, the 
CPU usually performed texture swizzling, resulting in low tex- 
ture-upload speeds. Each texture requires a read-swizzle-write 
memory DMA to the graphics card; this approach involves at 
least two reads and one write to system memory. With the lat- 
est workstations, Vital Images' target applications may fully 
exploit the bandwidth of PCI Express, says Zuiderveld. Though 
medical imaging may be a leading application for taxing the PCI 
Express bus, he believes that the trend toward using resources 
such as the virtual texture maps that Microsoft's (www. 
microsoft.com) DX10 supports, will drive steeply increasing 
usage of PCI Express's graphics bandwidth into mainstream 
applications. 

EXPRESS VIDEO EDITING 

One application that can now take advantage of PCI Express' 
unique capabilities is video editing. In video applications, PCI 
Express affords dramatically better back-channel bandwidth 
than AGP. Back-channel rates are important, because main 
memory must store intermediate and temporary video-process- 
ing results. The files are just too large for the graphics controller's 
local store. However, the memory must preserve this data with- 
out lossy compression, because the cumulative effects of repeat- 
ed compressions would visibly degrade the end result. With 
AGP, these writes of uncompressed data back to main system 
memory are major performance bottlenecks that PCI Express 
relieves. Watch for video editors that take advantage of PCI 
Express to enter the market. 

PCI Express is backward-compatible with PCI protocols but 



U cpu 



NORTH 
BRIDGE 



7Y 



V 



V 



SYSTEM 
MEMORY 



A 



GRAPHICS |V 
ADAPTER 




LOCAL 
MEMORY 



Figure 3 Nvidia and ATI with their TurboCache and HyperMemory 
technologies, respectively, use the PCI Express bus back channel 
to effectively cache their local memory (courtesy ATI). 



offers numerous features that go beyond the PCI protocols. One 
feature — isochrony, or equality in length of time — promises to 
further aid video editing and other heavily multithreaded appli- 
cations. PCI and AGP provide no guarantee for worst-case 
latency. Particularly in commercial-scale video editing for broad- 
cast and film, this lack of guarantee for data delivery creates dif- 
ficult challenges when trying to maintain output at a given frame 
rate. Isochrony could also ensure that systems running many 
multithreaded concurrent applications don't drop display frames. 
As chip-set and device -hardware vendors and operating-system 
upgrades add isochrony support, PCI Express will provide this 
guarantee that AGP could not. 

Some graphics vendors have already figured out how to exploit 
PCI Express' back-channel bandwidth to create a new class of 
products. Before PCI Express, graphics memory was either in 
system memory — for chip sets with integrated graphics — or on 
an external card with an external graphics controller. Though 
AGP's developers intended it to support heavy use of system 



EXPRESS OUTSIDE THE BOX 



An ongoing development 
in the PCI-SIG (Peripheral 
Component Interconnect 
Special Interest Group) 
that potentially relates to 
PCI Express graphics is the 
definition of a PCI Express 
cable. PCI Express intends 
to provide an l/O-attach- 
ment point for a host, not 
to be that I/O itself. The 
developers of PCI Express 
had no intention of com- 
peting with cabled-l/O 
interfaces, such as USB, 
FireWire, Ethernet, 
InfiniBand, and others. 



However, a cable allows 
the extension of the I/O- 
attachment point to be 
remote from a host sys- 
tem. A cable adapter card 
could plug into a 16-card 
slot and cable externally to 
a remote 16-card slot. 
Depending on distances 
and adherence to all the 
PCI Express design rules, 
this card might get away 
with containing no active 
circuitry, or it might contain 
a PCI Express switch or 
bridge that acts as a signal 
repeater. 



One intriguing possibility 
would be a cable adapter 
card connecting, through a 
PCI Express cable, to a 
remote box containing a 
switch that supports two 
16-card slots. Using a 48- 
lane switch, you could fully 
provision both of these 
slots and deliver a spec- 
compliant option. Such a 
remote dual-graphics box 
might afford some addi- 
tional advantages. For 
example, by removing the 
graphics controllers from 
the base system, it also 



removes their power and 
thermal requirements from 
burdening the base sys- 
tem. Also, any client with 
just one 16-card slot 
becomes "dual-graphics 
capable." Such a remote 
dual-graphics box might 
prove attractive to OEMs 
that do not perceive dual 
graphics to be a main- 
stream requirement but 
want to provide their cus- 
tomers the capability and 
an upgrade path. It also 
might make an attractive 
after- market product. 



76 EDN | JULY 20, 2006 



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EE] Go to www.edn. 
com/ms4201 and 
click on Feedback 
Loop to post a com- 
ment on this article 



memory, especially for textures, actual AGP imple- 
mentations failed to deliver sufficient performance. 
The performance gap was too great between imple- 
mentations with local frame memory on the graph- 
ics card and implementations using the AGP bus 
to access system memory. So, either you integrated 
graphics in a chip set, or you put a lot of graphics 
RAM on the external controller. A significant price 
and performance difference exists between these two 
approaches. Nvidia (www.nvidia.com) and ATI (www.ati.com) 
with their TurboCache and HyperMemory technologies, respec- 
tively, use the PCI Express bus back channel to effectively cache 
their local memory (Figure 3). 

This method provides lower performance than that of a large 
local memory store on the graphics card, although the per- 
formance decrease does not approach the degradation that would 
occur on AGP. Still, these caching technologies allow the 
removal of significant amounts of RAM from the graphics-con- 
troller card. Instead of, say, eight 8-MbitX 16-word DDR DRAMs 
for a traditional, state-of-the-art graphics controller, the con- 
troller card using caching over PCI Express could use just a sin- 
gle 4-MbitX32-word DDR DRAM. Memory costs would drop 
from approximately $16 in today's prices to $3.50, and per- 
formance would still be better than that of integrated graphics. 

The future of PCI Express graphics does not end here. The 
PCI-SIG (special-interest group) has announced work on a 



ATEDN.COM t> 



Generation 2 version of PCI Express. Though the 
specification was under development at press time, 
the PCI-SIG has announced key aspects of the new 
version. It will double the clock rate to 5 GHz. The 
group doesn't plan significant protocol enhance- 
ments over PCI Express 1.1, and Generation 2 will 
be backward-compatible with PCI Express 1.1. The 
PCI-SIG suggests that Generation 2 could be in pro- 
duction in 2007. When it does arrive, Generation 
2 PCI Express will continue the grand tradition of regularly 
expanding the graphics pipe between host and graphics con- 
troller that you have witnessed from ISA to PCI to AGP and 
now to PCI Express. B)N 

AUTHOR'S BIOGRAPHY 

David L Fair is enterprise-l/O-technology-initiatives manager at Intel 
Corps Server Platforms Group Marketing Division (Santa Clara, 
CA) . He is responsible for driving initiatives such as PCI Express 
for Intel's server and workstation businesses and managing the inde- 
pendent-hardware-vendor-enabling team. He has a bachelors degree 
in physics from Pomona College (Claremont, CA) and a doctor- 
ate in the philosophy of science from Princeton University (Prince- 
ton, NJ) . His personal interests include making broad technology 
adoption successful, road biking, "lunatic" high-end audio, quan- 
tum discontinuities in the ether, and trees that fall in the forest that 
no one hears. 



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DESIGN 
NOTES 



Handheld High Power Battery Charger 

Design Note 393 
Mark Gurries 



Introduction 

As the performance of many handheld devices approaches 
that of laptop computers, design complexity also increas- 
es. Chief among them is thermal management— how do 
you meet increasing performance demands while keeping 
a compact and small product cool in the user's hand? 

For instance, as battery capacities inevitably increase, 
charge currents will also increase to maintain or improve 
their charge times. Traditional linear regulator-based bat- 
tery chargers will not be able to meet the charge current 
and efficiency demands necessary to allow a product to 
run cool. What is needed is a switching-based charger 
that takes just about the same amount of space as a linear 
solution— but without the heat. 

Small PCB Footprint 

Figure 1 shows how simple a feature-laden LTC®4001- 
based charger solution can be. This switching-based 
charger only requires the IC, a small 1 .5pH inductor, two 



small 1 206-size 1 0pF ceramic capacitors, and a few other 
tiny components, Furthermore, even simpler configura- 
tions are possible (see Figure 2). This monolithic 2A, 
1.5MHz synchronous PWM standalone battery charger 
is packaged in a 4mm x 4mm 16-pin QFN package, 
which contains the built-in switching MOSFETs and 
charge termination controller. Figure 3 shows an actual 
PCB solution. 

Advanced Features and Functions 

One of the more unique features of the LTC4001 is its 
full remote voltage sense capability which permits faster 
charge rates by bypassing voltage drops in narrow PCB 
traces, EMI filters or current sense resistors forgas gauge 
related support; this is placed on the system side of the 
battery connector. Eliminating these losses in the sense 
circuit can significantly shorten the constant voltage 
phase of the overall charge time. 

U, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. 
All other trademarks are the property of their respective owners. 



4.5V TO 5.5V 




L1 

1.5jiH 



VlNSENSE 
PV|N 

PGND 

CHRG 
NTC 
FAULT 
EN 

PROG !DET 



SW 



SENSE 



BATSENS 
BAT 



LTC4001 



TIMER SS GNDSENS 





C2 — 


L 






0.22jnF — 








;R5 




— C3 




► 549Q 





C4 
10jLtF 



r 



2AHr 
2V 
Li-Ion 



L1: VISHAY DALE IHLP-2525AH-01 

R3: NTC VISHAY DALE NTHS0603N02N1002J 



Figure 1. Li-Ion Battery Charger with 3-Hour Timer, Temperature 
Qualification, Soft-Start, Remote Sensing and C/10 Indication 



07/06/393 




LTC40G1EUF 
,2V @ 2 Amp Switching Battery Charger 
Demo Circuit 930A 



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1-2 




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4.5V TO 5.5V " 



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VlNSENSE 
PV|N 

PGND 



SW 



SENSE 



BATSENS 
BAT 



LTC4001 



CHRG 
NTC 
- FAULT 
EN 

PROG IDET TIMER 



SS GNDSENS 



^274H 



0.22|iF 
0.1|iF: 



, 4.2V 
Li-Ion 



Figure 2. Simple 2A Battery Charger 

Another important feature is programmable soft-start, 
which requires only a small ceramic capacitor on the SS 
pin. Soft-start saves design time and cost by simplifying 
the power source requirements, precluding the need to 
handle fast start-up load transients commonly found with 
switching power supplies. 

Other advanced features include: 50mA trickle charge 
recovery of over-discharged batteries below 3V/cell; 
adjustable charge timer via a single capacitor on the 
TIMER pin; and automatic restart of a charge cycle when 
the battery voltage falls below 100mV of the full charge 
voltage. 

Two signals provide status. First is the FAULT pin, which 
in conjunction with the LTC4001 thermistor circuit, 
reports an out-of-range temperature situation. When a 
temperature fault occurs, the charge process is stopped 
immediately. Charging a battery when it i s out o f its normal 
temp range can damage it. Second, the CHRG pin shows 
three states relating to the charge state of the battery or 
charger. In addition to the normal OFF indication, it also 
indicates when the battery is below its user programmable 
l DET threshold or when in bulk charge mode. 

The EN (Enable) pin allows for shutdown of the charger, 
thus reducing its Vin quiescent current below 50pA and 
the battery drain current to less than 3jjA. Shutdown 
also occurs automatically if V ]N falls to less than 250mV 
above the current battery voltage. 



Figure 3. Actual LTC4001 Demo Board Showing a 
Compact Footprint (Height < 1 .8mm) 

Flexible Options 

The LTC4001 provides a number of flexible options in its 
small package. Bulk charge current is programmable via 
the PROG pin and a simple resistor, from 2A and below. 
A separate resistor on the I DE t pin is all that is required 
to set the full charge current termination or indication 
threshold independently of the bulk charge current set- 
ting. Typically the Idet threshold is set to 1/10 (C/10) of 
the bulk charge current, which equates to a battery be- 
ing about 95% to 98% full. Raising the Idet current trip 
threshold significantly reduces charge time by having 
a full charge indication occur sooner in exchange for a 
slightly lower full state of charge. Likewise, increasing 
the trip threshold extends the timer to approach a 100% 
state of charge if there are no serious time constraints. 
The type of charge termination is also flexible. In addition 
to timer-based termination, the charge can be terminated 
when the Idet threshold is reached or charge termination 
can be defeated all together to allow an external power 
manager to decide. 

Conclusion 

The LTC4001 is the charger of choice for the next gen- 
eration of handheld devices with its tiny solution size, 
unmatched power capability, high efficiency, protection 
features and flexible options. 



Data Sheet Download 



www.linear.com 



For applications help, 
call (408) 432-1900, Ext. 2364 



dn393f LT7TP 0706 305K • PRINTED IN THE USA 



Linear Technology Corporation f~Y r \ irifAD 

1630 McCarthy Blvd., Milpitas, CA 95035-7417 .A./ yU&dS? 

(408) 432-1 900 • FAX: (408) 434-0507 • www.linear.com © linear technology corporation 2006 



EDITED BY BRAD THOMPSON 
AND FRAN GRANVILLE 




READERS SOLVE DESIGN PROBLEMS 



Microprocessor generates 
programmable clock sequences 

William Grill, Honeywell BRGA, Lenexa, KS 



To produce trains of pulses suit- 
able for keying transmitters, 
testing circuits, and debugging data 
links, designers requiring continuous or 
event-driven pulse sequences have tra- 
ditionally relied on pulse generators or 
collections of simple circuits- Today's 
inexpensive microprocessors make it 
possible to design and build low-cost, 
dedicated pulse-sequence generators 
with a minimum of resources- In a 
small, SOT-23-packaged, 10F200 con- 
troller from Microchip (www-micro 
chip.com), the design in Figure 1 uses 
a code-based embedded table algo- 
rithm to generate an application-set- 
table period and table-based PWM 
(pulse-width-modulation) sequence. 
The application produces a continu- 
ously pulsed sequence and requires 
only three constants and a pulse-width 
profile table that it copies into the 
microprocessor's assembler-based code 
before compiling (Figure 2). 
All code branches undergo equal- 



2 TO 5.5V 

V DD O 



ization to produce a group of 29 con- 
stant instruction times. During soft- 
ware development, you can use coded 
constants and a table-based approach 
as a flexible method of modifying the 
pulse sequence. The three parameters 
that Figure 2 highlights include the 
number of PWM cycles that execute 
between tabled steps, which the algo- 
rithm passes as "temp_cntK." This 
parameter defines how many PWM 
periods of a range from one to 255 
repeat within each tabled step. For 
three cycles per table step, you use 
#define temp_cntK .3. The next 
parameter is the number of 29- 
instruction loops that execute during 
each PWM period. All branches of 
the coded instructions equalize to 
constant 29-instruction periods. 
When you copy this parameter as 
"loopsK," it can range from one to 
255. Using the 10F200's internal 4- 
MHz clock and an 8-bit counter to 
generate l-u>sec instruction periods, 
you can gener- 



Ri 
10k 



v ss O 



ENB 



PWMOUT 



IC, 

PIC10F200/202 



ENB 



MODE 



-O PWMOUT 



Figure 1 A microcontroller and a resistor can deliver a com- 
plex PWM output. 



DIs Inside 

86 Ceramic output capacitors 
enhance internally compensated 
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90 Tapped inductor, boost regula- 
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What are your design problems 
and solutions? Publish them here 
and receive $150! Send your 
Design Ideas to edndesignideas® 
reedbusiness.com. 



ate a PWM period range of 58 to 7395 
fisec, which corresponds to a fre- 
quency range of 17,241 to 135 Hz. For 
a 1-msec PWM-cycle period and the 
sequence in Figure 2, you require 31 
base loops per cycle, which you obtain 
by dividing 1 msec by the 29-jxsec 
instruction period: #define loopsK 
.31. 

You then equate the total number of 
table profile steps to "table_maxK." 
The total number of profile steps that 
a look-up table includes and that you 
copy into the code may vary from one 
to 252. In this application, five tabled 
steps correspond to pulse duty cycles of 
25, 50, 87.5, 12.5, and 75%. These val- 



PWM CYCLE - 



— ►- STEP — h- 



- PROFILE ■ 



Figure 2 This waveform profile comprises five steps, each 
using one of three PWM cycles. In continuous mode, the 
circuit's output repeats indefinitely. 



JULY 20, 2006 | EDN 83 



designideas 



ues undergo scaling according to the 
following equation: Duty cycle = INT 
(%T DTY /100XloopsK+0.5), in which 
INT is the integer value and %T DTY is 
the percentage of the total duty cycle. 
In this example, loopsK=31. The 
number of steps in the table passes to 
the program as #define loop_maxK .5. 

The pulse-duty cycle can vary only in 
increments of a single 29-instruction 
base loop, and, as a consequence, the 
pulse duty cycle's resolution varies as 
the number of basic loops for the wave- 
form's desired period, which you define 
as loopsK=31 loops. Thus, the duty- 
cycle resolution equals l/(loopsK), or 
1/(31) =3.22% for this application. 

You can use a spreadsheet or manu- 
ally calculate the translated and 
scaled duty-cycle values and store 
them in the data-profile table. For 
example, you calculate the value for a 
25% duty cycle as INT(25/resolution+ 
0.5HNT(25/3.22+0.5), where INT 
represents extraction of the integer 
value of the computed quantity. For 
required duty cycles of 25, 50, 87.5, 
12.5, and 75%, the values that pass to 
the data-profile table are retlw_8, 16, 
27, 4, and 23, respectively. The as- 
sembly-language program available for 




Figure 3 After undergoing lowpass-filtering, the controller's pulse-width-mod- 
ulated output (lower trace) reveals its sine-wave origin. 



downloading from the online version 
of this Design Idea at www.edn.com/ 
060720dil includes these duty-cycle 
values and the three other parameters. 

The program includes two addition- 
al features: Connecting Pin 1 to ground 
enables a continuous-output mode. 
Connecting Pin 1 to +V DD evokes a 
single output waveform. Pin 3 serves as 
a high true-output enable when you 
connect it to +V DD or as a positive- 
edge trigger input when you pull the 
pin to ground and release it. Note that 
the program currently includes no con- 
tact-debounce routines for either 
input. 



DUTY- 
CYCLE 
TABLE 
VALUES 



80 
75 
70 
65 
60 
55 
50 
45 





















i a n p. unin nnn i nn > — i ] 




~ 1 MM II MINI II MM II MINI III III III Mil III III II II Mil III III Mil III III III Mil Mil MM II Mil III III III 



15 22 29 36 43 50 57 64 71 78 85 92 99 
PULSE-POSITION TABLE ENTRIES 



Figure 4 Devised for testing a serial link's error response, this waveform plot 
displays pulses' locations within the waveform (horizontal axis) versus the 
duty cycle for each pulse (vertical axis). The waveform cycle repeats after 
pulse 1 00 ends. 



In the example in Figure 3, the con- 
troller delivers a pulse-width-modu- 
lated output (lower trace), which, after 
processing by a single-pole lowpass fil- 
ter, corresponds to a sine wave (upper 
trace). Using another version of the 
circuit, you can evaluate how a criti- 
cal midword error affects a serial link's 
characteristics, system timing, and 
response latency. 

The waveform in Figure 4 compris- 
es 100 pulses, 99 of which exhibit a 
nominal duty cycle that varies from 48 
to 5 1%, and a single error pulse with a 
75% duty cycle. The waveform-table 
entries use values of loopsK=100, 
temp_cntK= 1, and table_maxK= 100 
to produce a pulse sequence compris- 
ing 74 pulses with nominal duty cycles, 
a single pulse with a 75% duty cycle, 
and a final sequence of 25 clocks with 
nominal duty cycles. The entire 
sequence repeats at a 3 45 -Hz rate. 

Using a 4-MHz-clock-rate version 
of Microchip's 10F220 controller 
constrains the basic software-timing 
loop to a 29-fisec period. You can 
compile the program into an 8-MHz 
10F220 to reduce the timing loop to 
14-5 fjusec and extend the output's 
usable bandwidth. You can modify the 
code in the listing to suit other com- 
patible microprocessors to obtain 
greater bandwidth and integrate addi- 
tional functions. As is, the circuit 
requires only 155 bytes of internal 
EEPROM and occupies an SOT-23 
pc-board footprint — not bad for a 
processor that costs less than $1.EDN 



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Distributed by Maxim/Dallas Direct!, Arrow, Avnet Electronics Marketing, Digi-Key, and Newark. 
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas Semiconductor logo is a registered trademark of Dallas Semiconductor Corp. 

© 2006 Maxim Integrated Products, Inc. All rights reserved. 



designideas 



Ceramic output capacitors enhance 
internally compensated switchers 

Robert Kollman, Texas Instruments, Dallas, TX 



Integrating compensation com- 
ponents with a power- supply 
controller and buck regulator's power 
switches can minimize pc-board area, 
improve reliability, and eliminate 
assembly errors by reducing the num- 
ber of components and solder joints. 
However, integration also limits a de- 
signer's range of choices in the selection 
of output-filter components- Figure la 
presents a typical switching regulator 
based on Texas Instruments' (www.ti. 
com) TPS5430. The boxed area in Fig^ 
ure lb shows a simplified version of the 
IC's internal small-signal-equivalent 
circuit, which includes an error ampli- 
fier, Ep passive-compensation compo- 
nents; and a voltage-controlled volt- 



age-source, E 2 , which represents the 
modulator and the power switches- 
Support components external to the IC 
include output-filter components and 
their parasitic resistances, a resistor rep- 
resenting an external load, and a 
divider comprising R x and R 2 that sets 
the output voltage. The compensation- 
circuit design accommodates a certain 
range of output-filter inductance and 
capacitance and their associated para- 
sitics. 

Figure 2 shows Bode diagrams for 
the error-amplifier and modulator- 
gain blocks (2a) and the entire regu- 
lator system (2b)- Envisioning that 
end users would specify aluminum 
electrolytic capacitors for the output- 



ic 1 

TPS5430DDA 



GND 




GND 



(b) 



^INT2 

20 pF "Q_ 




1.6 jjlF " 



Figure 1 This TPS5430 power-supply design includes an aluminum electrolytic output 
filter capacitor, C (a). A circuit model includes parasitic resistances associated with 
output-filter components l_ and C (b). 



filter circuit, the IC's designer includes 
a Type 3 compensation circuit to opti- 
mize the IC's performance for alu- 
minum capacitors' characteristics. 
Note that a Type 3 compensation cir- 
cuit includes a pole at the origin of the 
circuit's pole-zero plot to provide high 
gain at dc and an integratorlike high- 
frequency roll-off augmented with 
pairs of poles and zeros to provide 
phase and gain margins at certain fre- 
quencies (Reference 1). 

The regulator's LC-output modula- 
tor/filter's amplitude-response curve 
peaks at the resonant frequency set by 
the filter's inductor and output capac- 
itor, and then it decreases at a —40- 
dB/decade rate until it reaches a zero 
at a frequency set by the output capac- 
itor and its ESR (equivalent series 
resistance). Beyond that frequency, 
the output inductor's and the capaci- 
tor's ESRs determine the attenuation 
curve's slope, resulting in a 
— 20-dB/decade rate. 

For good regulation, the 
error amplifier provides a high 
dc gain at low frequencies. 
However, to ensure stability, 
the loop gain must decrease as 
frequency increases. The goal 
is to approximate a — 20-dB/ 
decade roll-off at all frequen- 
cies. Placing two zeros at the 
output filter's resonant fre- 
quency helps cancel the two 
poles representing the reso- 
nance. Adding a pole to the 
error-amplifier response can- 
cels the zero that the output 
capacitor and its ESR intro- 
duce. Adding a final pole 
above the power supply's 
crossover frequency helps fur- 
ther increase the regulator 
loop's stability. Figure 2b 
shows the sum of the gains of 
the error amplifier and modu- 
lator/filter gain. The power 
supply's characteristics show a 
30-kHz bandwidth and a 60° 
phase margin that ensures sta- 
ble operation. 
The power-supply-control- 
(continued on pg 90) 



86 EDN | JULY 20, 2006 



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Distributed by Maxim/Dallas Direct!, Arrow, Avnet Electronics Marketing, Digi-Key, and Newark. 
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas Semiconductor logo is a registered trademark of Dallas Semiconductor. 

© 2006 Maxim Integrated Products, Inc. All rights reserved. 



designideas 





Figure 3 Gain (a) and phase (b) plots show that using a ceramic-dielectric output-filter capacitor erodes the phase-angle 
margin and pushes the circuit dangerously close to oscillation. 



1V AC 




O TO PIN 4, 



Figure 4 A few passive components supplement R 1 and R 2 
and stabilize the circuit for use with a ceramic-dielectric out- 
put-filter capacitor. 



































































, OVERALL 


PHASE 
























V 


























































s 45° PH 


<\SE 












' \M ARC 


IN 


































OVERAL 


.GAIN 


























































































00 Hz 1 


Hz 10 
FREQl 


kHz 1 00 
JENCY 


kHz 


1 MHz 



Figure 5 The phase-angle plot for the circuit of Figure 4 
shows a sufficient phase-angle margin to allow stable 
operation with a ceramic output-filter capacitor. 



88 EDN | JULY 20, 2006 



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Distributed by Maxim/Dallas Direct!, Arrow, Avnet Electronics Marketing, Digi-Key, and Newark. 
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas Semiconductor logo is a registered trademark of Dallas Semiconductor Corp. 

© 2006 Maxim Integrated Products, Inc. All rights reserved. 



designideas 



loop response (Figure 3 ) illustrates the 
circuit's behavior when the design 
includes ceramic-dielectric output-fil- 
ter capacitors and the same integrated- 
compensation components in Figure 1 . 
Ceramic capacitors present a much 
lower ESR than do aluminum elec- 
trolytic capacitors, and their capaci- 
tance determines the filter's attenua- 
tion rather than their ESR- Conse- 
quently, at high frequencies, the LC fil- 
ter's characteristics include a double 
pole and a steeper, — 40-dB/decade 
slope. In addition, filter attenuation in- 
creases at the desired crossover fre- 
quency, degrading phase and gain mar- 
gins- Figure 3b indicates that the power 
supply is unstable and, with no phase 
margin, will likely oscillate. 

Replacing the divider network, R x 
and R 2 in Figure 1 with the passive net- 
work in Figure 4 stabilizes the regula- 
tion loop and allows an internally com- 
pensated controller to use ceramic out- 
put capacitors. The network's compo- 



nents add two sets of poles and zeros to 
the compensation network to cancel 
the consequences of using ceramic out- 
put capacitors. For example, C 2 and R 3 
provide attenuation that reduces the 
crossover frequency. You select C 2 to 
provide attenuation at frequencies 
much lower than the crossover fre- 
quency. Unfortunately, C 2 adds a neg- 
ative-phase shift that R 3 returns to 
nearly zero at the design's crossover fre- 
quency. Adding C l introduces a phase 
lead that compensates for the ceramic 
capacitors' negative effects. Without 
C p the filter's 180° phase shift would 
reduce the regulator's phase margin to 
nearly zero. 

The phase angle starts increasing at 
a frequency that C 1 and R x determine, 
and they introduce a zero in the phase- 
plane plot at that frequency (Figure 5). 
At a frequency that C 1 and R 3 deter- 
mine, a pole in the phase-plane plot 
terminates the phase angle's increase. 
| The geometric mean of the pole and 



zero frequencies determines the maxi- 
mum phase-angle boost. 

As a starting point, you can place the 
first pole, which C 2 and the parallel 
combination of R 1 and R 2 determine, at 
a low frequency, such as 100 Hz. Next, 
adjust the values of C 2 and R 3 to set the 
first zero's frequency at 1 kHz, which is 
much less than the gain curve's 0-dB 
crossover frequency. Finally, set the 
zero that C 1 and R x introduce to a fre- 
quency that's at least a factor of two 
below the zero-gain crossover fre- 
quency to ensure a 45° phase margin 
at the crossover frequency. The Bode 
plot in Figure 5 features a 30-kHz reg- 
ulation-loop bandwidth that provides 
good transient response and more than 
45° of phase margin to ensure good sta- 
bility.EDN 



REFERENCE 

d "Optimal Feedback Amplifier 
Design For Control Systems," Venable 
Industries, www.venable.biz/tp-03.pdf. 



Tapped inductor, boost regulator 
deliver high voltage 

David Ng and Adam Huff, Linear Technology Corp, Milpitas, CA 



When you face the task of gen- 
erating a regulated voltage 
that's higher than the available 
power-supply voltage, you may con- 
sider a boost regulator. Although a 
boost converter can in theory gener- 



ate almost any voltage that's higher 
than its input, practical considerations 
limit the output to approximately 
eight times its applied voltage. To gen- 
erate an even higher voltage, consid- 
er using a tapped- inductor boost top- 



COILTRONICS 
CTX02-17409-R 
1-TO-6 TURNS RATIO 
Lia L 1B 



GND O- 



22 
6.3V 



Ri 
37.4k 

C 2 
1 nF 



"C 1 
LT1 949 
VIN LBO 



SHDN 
GND 



LBI 

SW 
FB 



) NC 
)NC 




v OUT+ 

-O100V 
5 mA 



-O GND 



Figure 1 Using a tapped inductor extends a boost-topology switching regula- 
tor's practical output-voltage range. 



ology. Figure 1 shows an implemen- 
tation of a converter that boosts a 3 V 
input to 100V dc. The connections to 
the regulator chip are similar to those 
of a traditional boost converter, but, to 
achieve the high boost ratio, this 
design uses L p a l-to-6-turns-ratio, 
tapped inductor. 

The waveforms in Figure 2 show 
the input voltage, the voltage at 
power-switch IC^s output, Pin 5, and 
rectifier diode D^s anode voltage. As 
in any boost circuit, inductor L^s core 
stores energy when IC^s internal out- 
put switch conducts. When the 
switch turns off, the voltage across its 
terminals and L 1A goes higher than the 
input voltage. Due to inductive cou- 
pling and the larger number of turns 
that make up L 1B , the voltage at rec- 
tifier diode D x 's anode and hence the 
output voltage goes much higher. 
Resistors R 2 and R 3 form a feedback- 
voltage divider that closes the regula- 
tion loop. The R 4 'C 4 network forms a 
snubber circuit that suppresses the 
impact of diode D^s small parasitic 
capacitance. Without the network, 



90 EDN | JULY 20, 2006 



designideas 




Figure 2 For a 3V-dc input (lower trace, horizontal line), the voltage at regula- 
tor IC^s SW pin reaches a peak of approximately 1 8V (lower trace, pulsed 
waveform). The 1-to-6 step-up turns ratio of inductor L 1 further increases the 
peak output voltage to 1 60V (upper trace) to produce 1 00V dc. The upper 
trace's lower limit goes to -6XV |N (— 18V) due to the tapped inductor. 




power switch IC X "sees" a capacitance 
that's 36 times larger due to the mul- 
tiplicative effect of the tapped induc- 
tor's turns ratio. 



Measuring only 5.6X6X3.4 mm, 
Coiltronics' (www.coiltronics.com) 
CTX02- 17409 tapped inductor, L p 
and Linear Technology's (www.linear. 



Figure 3 The entire boost- 
converter circuit occupies 
a footprint of less than 
1 .5X 1 .25 cm on a single- 
sided pc board. 



com) LT1949 monolithic regulator, 
IC p available in an eight-lead MSOP 
package, present small pc-board foot- 
prints. When you implement the cir- 
cuit on a single-layer pc board, the 
entire circuit occupies less than 1.9 cm 2 
of board space (Figure 3). For best 
results, review the board-layout sug- 
gestions in the device's data sheet (Ref^ 
erence 1 ) and use multilayer-ceramic 
capacitors for C 1 and C 3 .EDN 

REFERENCE 

m www.linear.com/pc/productDetail. 
do?navld=H0,C1 ,C1 003,C1 042,C1 
031,C1061,P1958. 



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JULY 20, 2006 | EDN 91 



productroundup 



DISCRETE SEMICONDUCTORS 




MOSFETs provide 
high thermal efficiency 
in compact package 

Requiring the same 5x6-mm 
board area as an SO-8 package, the 
20A STK800 and 30A STK850 power 
MOSFETs come in a PolarPak package, 
providing top and bottom heat-dissipation 
paths, resulting in a 0.8-mm profile. The 
lead-frame and plastic encapsulation are 
similar to those for standard power-MOS- 
FET packages, ensuring good die protec- 
tion and easy handling in manufacturing. 
Due to its increased heat dissipation, this 
device can handle twice as much current 
within the same footprint as standard SO- 
8 packages. The STK800 and STK850 cost 
$1.20 and $1.60 (1000), respectively. 
STMicroelectronics, www.st.com 



KEIL 

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Microcontroller Tools 



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92 EDN | JULY 20, 2006 




NEW 




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Modular power distribution 
system for telecommunications, 
power supplies, switchgear, 
instrumentation and process 
control applications. 



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DISCRETE SEMICONDUCTORS 




Power-MOSFET family 
has a small footprint 

□ Aiming at portable-system appli- 
cations, the new |jlCoo1 family of 
power MOSFETs comes in a thermally 
enhanced, 2x2-mm WDFN6 package. 
These six products feature exposed-drain 
DFN technology, providing a 38°C/W 
thermal resistance and a 1.9W power rat- 



ing. The devices have the same footprint 
dimensions as the SC-88 and SC-70-6 
packages. The jjlCooI family costs 29 to 
31 cents (10,000). 

On Semiconductor, www.onsemi.com 

Ultrafast rectifiers 
maintain low power- 
supply losses 

□ The 600V, 8A UH8JT and UHF- 
8JT rectifiers provide a 25-nsec 
reverse-recovery time, decreasing switch- 
mode-power-supply losses. The devices 
combine improved switching performance 
with a 150-nsec forward-recovery time 
under test conditions and a 1.85V for- 
ward-voltage-drop rating at 125°C, 
improving thermal performance and sys- 
tem efficiency. The UH8JT and UHF8JT 
cost 35 cents each (10,000). 
Vishay Intertechnology, www. 
vishay.com 

GaN-transistor family 
targets cellular, WiMax- 
base-station markets 

□ This family of GaN (gallium- 
nitride) HEMTs (high-electron- 
mobility transistors) targets cellular 
infrastructures and WiMax base sta- 
tions. The devices feature a 67% peak 
drain efficiency at the UMTS (univer- 
sal-mobile-telecommunications-system) 
frequency band and a 60% efficiency at 
the WiMax frequency band. The fami- 
ly's 8, 60, 90, and 120W devices aim at 
the UMTS or 3G-base-station segment. 
The 2.5 -GHz transistors suit the Wi- 
Max-base-station segment and are av- 
ailable in 50, 75, and 100W options; 
3.5-GHz, 8 and 50W options are also 
available. 

RFMD, www.rfmd.com 



Midvoltage MOSFETs 
target secondary-side 
synchronous rectification 




The 60V IRF7855PbF, 80V IRF- 
7854PbF, and 100V IRF7853PbF 



Which NVRAM 

would you choose? 




y-based NVRAMs 



Leaded 



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94 EDN | JULY 20, 2006 



productroundup 

DISCRETE SEMICONDUCTORS 



N-channel HEXFET MOSFETs come in 
a lead-free SO- 8 package- These mid- 
voltage MOSFETs target ac/dc second- 
ary-side synchronous rectification in 5 
to 1 9 V-output- voltage flyback-convert- 
er and resonant-half-bridge applications. 
These devices also suit isolated, medi- 
um-power dc/dc applications as primary- 
side switches in forward or push-pull 
topologies for 18 to 36V- input- voltage, 
isolated dc/dc converters- The IRF- 
7855PbF, IRF7854PbF, and IRF7853PbF 
cost $1.04, $1-06, $1.20, respectively. 
International Rectifier, www.irf.com 



Diodes feature a 

high temperature rating 

The HVTD series diodes for 
down-hole, seismographic, auto- 
motive, and traction applications feature 
a 7000V rating and a 200°C temperature. 
These devices feature a 1-mA maximum 
forward current in oil, a 30-jjlA maximum 
reverse current, and an 18-fiA typical 
reverse current. Devices in the HVDT 
series cost $4(100). 
HV Component Associates, www. 
hvca.com 



TEST & MEASUREMENT 



Measurement software 
builds and runs 
SCS applications 

The latest version of DAPstudio 
measurement software allows users 
to design filters that roll off at 96 dB per 
quarter-octave and to build and run appli- 
cations based on the vendor's SCS (signal- 
conditioning-system) series, requiring no 
additional data-acquisition software. 
Connecting directly to the sensors, the 
SCS also connects to specialized DAP 
boards, including iDSC 1816 boards, in 
PCs, providing additional channels of fil- 
tered 16-bit resolution data at ± 10 mV to 
±10V. The SCS/iDSC hardware costs 
$1000 per channel. The DAPstudio costs 
$ 1 99, and a free trial is available for down- 
loading from the vendor's Web site. 
Microstar Laboratories, www. 
mstarlabs.com 



PCI Express analyzer 
aims at AMC form factor 

Targeting the AMC (Advanced 
Mezzanine Card) form factor, the 
Vanguard Express PCI Express protocol 
and link analyzer can debug, test, and val- 
idate the PCI Express protocol and can 
test AMC.l types 1, 2, 4, and 8 modules. 
Functioning as a self-contained unit, the 



analyzer installs between the device under 
test and the host system, allowing testing 
with minimal intrusion to the system 
under test. Features include independent 
and concurrent operation of both the ana- 
lyzer and a statistics and protocol check- 
er, a 256-Mbyte trace buffer, and eight trig- 
ger events. The Vanguard Express AMC 
costs $23,950. 
VMetro, www.vmetro.com 



Midrange DAP board 
uses an onboard 
Pentium processor 

Operating from a 233 -MHz Intel 
Pentium CPU, the midrange 
DAP (data-acquisition-processor) 5000r/ 
526 board includes 16 analog inputs, two 
analog outputs, 16 digital inputs, and 16 
digital outputs. External rack-mounted 
hardware allows for extending the chan- 
nel counts to 512, 66, 128, and 1024, re- 
spectively. The device can acquire 14-bit 
data at 800k samples/sec and can convert 
833,000 values/sec on the onboard ana- 
log outputs. An onboard processor allows 
fast real-time processing and a 0.1 -msec 
task- time quantum latency. The DAP 
500*1526 costs $3295. 
Microstar Laboratories Inc, www. 
mstarlabs.com 




No two circuit breaker 
applications are alike 

Only E-T-A offers 
more technologies 



X8345-D01 

Modular power 
distribution system 
handles 125 A per channel in 
2ll-height for 19" or 21" and 
ETSI racks. 
www.e-t-a.com/x8345edn 






ESX10 

Compact Electronic Circuit 
Protector allows selective 
disconnection of loads 
connected to 24VDC switch- 
mode power supplies. 
www.e-t-a.com/ esxioed n 

E-1 048-800 

Remote power 
controller utilizes 
"SMART" circuit 
protection tech- 
nology. Circuit 
breaker, relay, 
analog output, 
and diagnostics 
in a single unit 
www.e-t-a.com/e1048edn 




Circuit Protection & Control 



WWW.E-T-A.COM 
1-800-462-9979 




produc 



mart 



This advertising is for new and cur 



PULSE GENERATORS 
AND ACCESSORIES 





* General purpose pulsers 

* High speed pulsers 

* Pulsed laser diode drivers 

* Constant current pulsers 

* Impulse generators 

* Frequency dividers 

* Delay generators 

* High voltage function generators 

* Pulse amplifiers, accessories, and more! 

Manymodels are available with IEEE-488.2 GPIB 

and RS-232 computer control ports. 

For data sheets, pricing & application notes, visit 

www.avtechpulse.com 



AVTECH 



ELECTROSYSTEMS 



Phone: 800-265-6681 
or 61 3-226-5772 
Fax:613-226-2802 
info@avtechpulse.com 
www.avtechpulse.com 



USB CANbus I2C RS232/485 GPS 




USB to l 2 C 
for PC's 



NEW! UCA93LV - bus-poweredi 
USB I2C interface - great for laptops! I 
400kHz bus monitoring / addr. filtering! I 
Also: PCI93LV - PCIbus version I2C 

master/slave/bus-monitor. $499.00 

All in one! 



CleverScope - 100 MHz 

Scope, SpectrAnal, LogicAnal, & SigGen. 
for PCs. 4 Msamples storage! Easy A-B, 
math! 2 x 10 bit ch, 8 dig. I/P. Opt. 0-10 
MHz SigGen.+ math + filters. 
CS328 only $999! 



Saelig Co. Inc. 

ph: 1-888-7-SAELIG 
www.saelig.com 



Internet Modem 





YOUR 
iPRODUCTl 



PC or I ^^ ^Sjy 

MACHINE (INTERNET J 



Diagnostic/Alarm/Monitoring 

• Send/Receive data via email or hosted web page 

• Uses no CPU/software overhead with existing designs 
•SMTP/P0P3 enabled 

• PC compatible email 

• Send messages on alarm condition 

• Internet transfer to voice/data/fax using low cost ISP 

• Operates independent of your system application CPU 

• 2400 to 56k bps data transfer, unlimited messages 

• Evaluation kits available from $159.95 

www.cermetek.com 

Tel: 800-882-6271 
Sunnyvale, CA USA 



Complete Ultrasoni 
Ranging Sensor - 



GIGA-SNAP BGA 
SOCKETS AND ADAPTERS 




Giga-snaP BGA SMT Adapters 
allow affordable socketing for later 
upgrading of PCB's. 

• Ultra low insertion force 

• GHz bandwidth 

• Same CTE as PCB 

• Patent pending epoxy overmold 
for maximum solderability 

• Up to 2000 pins 

• 0.8 to 1.27mm pitch 

tf\ Ironwood Electronics 

^^1-800-404-0204 




Same Sensor Invented by Polaroid to Focus Cameras! 
Electrostatic Transducer and Drive Module in One 
Complete Package! 

Non-Contact Ranging and Measurement from 6" to over 40'! 
Perfect Sensor for Non-Contact Measurements, Liquid or 
Bulk Level Sensing, Proximity Sensing, Robot Guidance 
We Sell Complete Ranging Kits and Components 

Phone 734-953-4783 

Fax 734-953-4518 
www.senscomp.com 




96 EDN | JULY 20, 2006 



To advertise in Product Mart, call Judy Keseberg at 800-41 7-5370 



TechRecovery 

Test Equipment At Wholesale Prices 

1-877-TestUSA (1-877-837-8872) Outside the USA call: (508) 634-1530 



Analogic 2040 800MHz Waveform Synthesizer $495.00 

Anritsu 69037B 20GHz Gen. Opt. 9K, 15A, 19 $11,995.00 
Fluke 2620A Hydra Data Aquisition Unit $2,750.00 
HP Agilent 34401 A 6.5 Digit Multimeter $849.00 
HP Agilent 345 8 A Digital Multimeter Opt. 002 $6,795.00 
HP Agilent 6612B DC Power Supply 20V-2A $875.00 
HP Agilent 6627 A DC Power Supply 20V-2A $935.00 
HP Agilent 6671 A DC Power Supply 8V-22A $1,795.00 

HP Agilent 70843B Bit Rate Tester Opt. UHF $39,995.00 

HP Agilent 8596E 12.8GHz Spectrum Analyzer $13,995.00 
HP Agilent 8657B 2GHz Signal Gen. Opt. 002 $1,935.00 

HP Agilent E4422B RF Signal Generator $10,995.00 
LeCroy LC334AM 500MHz 4Ch. Oscilloscope $5,995.00 

Rohde & Schwarz SME06 6GHz Signal Gen. $11,995.00 
Rohde & Schwarz SMIQ03B 3.3 Signal Gen. $6,995.00 

Tektronix AWG6 10 50KHz-2.6GHz Arb. Gen. $19,995.00 
Tektronix CSA8000 Signal Analyzer OEM Cal $8,549.00 

Tektronix TDS794D 4Ch. Digital Oscilloscope $12,995.00 



www.TechRecovery.com 



SensorCore(SC)' 



Lvb'J SUSS Ul 



fa Acquisitio 
24-bit AD 




• Directly work with Thermocouples, Strain gauges . . . 

• 100 M BaseT, FAT file system and CompactFlash. 

• 2.0" x 4.5", C/C++ programmable, 80MHzx86, 

48 24-bit ADCs, DAC, RS232, l/0s. Standalone SBC. 



50+ Low Cost Controllers with ADC, DAC, UARTs, 300 l/Os, 
solenoid, relays, CompactFlash, LCD, Ethernet, USB, motion 
control. Custom board design. Save time and money. 



1724 Picasso Ave., Suite A 
. Davis, CA 95616 USA 



TFJ? W Tel:53 °- 758 -° 180 • Fax:530-758-0181 
1 J^lXi y www.tern.com «»ns 
INC. sales@tern.com ^JHJK 



ADVERTISER INDEX 



^•oiTipcjiiy 


Page 


/Ayilfc^l II Ifc^OI II HJUjyifc^o 


45 
45 


Allied Eloctronics 


70 


MllfcMU V^VJI|J 


25 


r\l L/t^VIOt^o II 


14 15 




27 29 




69 


Ar^^rm ^^n+iv-il ^\/c+omc 1 t/H 
MlOvJl 1 1 K^{Jl lllvjl Oyolfc;l 1 lo LIU 


92 


Austriomicrosystems Acj 


91 


mvi id citJUinji iioo ivuji ivtriii ly 


31 




55 


r\vlt;Oll tlt;OllvJoyolt;l I lo LIU 


96 


v^OCL/ IcV/i 11 lUIUyifc?o \ IJ\aW\) II 


67 


v^fcil 1 1 It^lt^ls. 


96 


Cirrus Locjic Inc 


53 


L^iyi l\t;y V—UILJ 


] 


Echelon Corp 


35 


P-T-A C^irr^i lit Rro/~i l/orc 
c 1 n v^HOUII Dlt^Ulvtrlo 


93 




95 


runoi mu oxs\ i iioui iuuoiui 


] ] 


rlt^t^oOUIt^ 1 IIOUI IUUUIUI 


33 


iuc ri rri , in 
ino v?iuu|j 


56 


Infineon Technolocjies Corp 


4 


II llfc^l 1 IUIIUI IUI Kt^Ollllt^l V—UILJ 


37 


Intorsil 


OOA-QOn 




59 61 




63 65 


IIUI IWUUU clt^OIIUI HOo 


96 


Ixys Corp 


44 


l\fc;N OUllWUlt; 


92 


K©ithl©y Instruments Inc 


2 


lii it;ui it;ui ii luiuyy v^uip 


77 




79 80 





81 82 


IVIUII 1WUI l\o II IC 


12 


iviuaii 1 1 ii nt^yiuit^u nuuubio 


85 




87 89 


IVIC7I IIUI V7lUpillUO 


73 


Micrel S©miconductor 


39 


IVIUUOOl CIC7UIIUI IIUO 


C-3 


Notionol Instruments 


49 


INUIIUI IUI Oxii 1 IIOUI IUUOIUI 


1 7-20 




41 43 


NCI 


78 


Performonce Motion Devices 


68 


Pico Electronics 


54,97 


Saelig Co Inc 


96 


0^rv^4>^^ 1 ICA 

bamtec UbA 


8 


Senscomp Inc 


96 


Simtek 


94 


STMicroelectronics 


C-A 


Taiwan External Trade 
Development Council 


13 


Ifc^OI 1 IUUIO 


96 


Techrecovery 


97 




97 


IcaUo II lollUI 1 lt?l Ho 


C-2 




3 6 




AAL-AAR 




51 


Versalogic Corp 


97 


Vicor Corp 


75 


Vision Components 


78 


WinSystems 


23 


Xilinx Inc 


16 


This index is provided as an additional 
service. The publisher does not assume 
any liability for errors or omissions. For 
immediate information on products and 
services, go to Reader Service under 
Tools & Services at www.edn.com. 




Over 

2500 Std. Models 
Surface Mount and Thru-Hole 

DC-DC Converters 

3.3 to 10,000 VDC Outputs 

Low Profile / Isolated 
Up to 10,000 Volts Standard 
Regulated Models Available 




High 
Power 



Up to 350 VDC Outputs 

(Units up to 150 Watts) 
Regulated I Wide Input Range 
Isolated Outputs 




INDUSTRIAL • COTS • MILITARY 
Delivery Stock to ONE WEEK 

PICO ELECTRONICS, Inc. 

143 Sparks Ave., Pelham, New York 10803 
See EEM or send direct for Free PICO Catalog 
Call Toll Free 800-431-1064 • FAX 914-738-8225 
E Mail: info@picoelectronics.com 




ft. • -fm 
CfiBRA" 

Pentium® M Single Board Computer 

Order now and receive a 
Software Development Kit for 
Windows XP Embedded or 
Linux, and a FREE Pretec™ 
CompactFlash. 

Special offer, while supplies last. Details at 

www.VersaLogic.com/Cobra 

\ersa1jogic 

"corporation 

(800) 824-3163 • info@VersaLogic.com 




JULY 20, 2006 | EDN 97 



realitycheck 



YESTERDAY'S HYPE MEETS TODAY'S REALITY 




ZiLOG eZ80F915050MOD Development Module 



The eZ80F91 operates at 50MHz with 256Kb on-chip Flash 
memory and 16Kb of internal SRAM, 51 2Kb of off-chip 
SRAM, 1 Mb of Flash, and a 1 0/1 OOBaseT Ethernet PHY 
with an RJ-45 connector. Oper.temp.0°C to 70°C,3.3V 
at 1 25mA, 2 x 60-pin system; MPU bus/control signals, 
IrDA transceiver. 




DLP Design DLP-2232M Dual 
Channel USB Module 

Uses FTDI's FT2232C 3rd generation dual 
channel USB-FIFO/UART; simple solution for 
interfacing ASIC/MCU/FPGA/DSP-based designs 
to host computer via USB; up to 8Mb per 
second, USB 1.1 compliant; no in-depth 
knowledge of USB required. 



mouser.com/zilog/a 



(SLi 

/"lot? 




DLP .... . . 

Design mouser.com/dlpdesign/a 



Embedded Products for 
the Latest Technologies 



-v, 





Reduced time to market is critical for new 
product designs -- lost time means lost revenue. 
That's why engineers depend on Mouser to 
deliver a broad selection of embedded products 
fast! 

And because these components have a 
solution designed in, engineers can utilize these 
plug-and-play modules from test through 
production - saving time and money. 

Experience Mouser's time-to-market 
advantage! Our vast selection of the NEWEST 
products, NEWEST technologies, no minimums, 
and same-day shipping on most orders, gets 
you to market faster. We make it easy to do 
business with Mouser! 

moUSer.COm (800) 346-6873 



a tti company 



Newest Products 

for Your New Designs 




Lantronix 
XPort® 
Embedded 
Device Server 



Reduce design time and build Ethernet/IP 
connectivity into your products, quickly and 
simply, with the XPort embedded module. XPort 
is the most compact, integrated solution 
available to web-enable any device with a serial 
interface. XPort is powered by Lantronix's own 
DSTni™ networking chip, which includes a 
1 0/1 00 MAC/PHY and 256kb of SRAM. 

LAN'RONIX* mouser.com/lantronix/a 




NetBurner 
MOD5272 
32-bit 

Processor Module 



This module features a web-based control 
interface, full 32-bit architecture, full suite of 
TCP/IP protocols, and 10/100baseT RJ45 network 
interface. Adds network capabilities without 
taking up valuable design time. 







t B u r n e r 

Networking in 1 Day! 



mouser.com/netbu rner/a 





Rabbit Semiconductor RCM3700 
RabbitCore Module 

Features up to 512 Flash/ 51 2K SRAM, 4 serial 
ports, +5 VDC tolerant I/O, quadrature encoder 
inputs, PWM outputs, and a low-profile footprint 
(2.95"x1.20"x.88"). 



mouser.com/rabbitsemi/a 



The NEWEST Semiconductors | Passives | Interconnects | Power | Electromechanical | Test, Tools & Supplies from Mouser Electronics 

Mouser and Mouser Electronics are registered trademarks of Mouser Electronics, Inc. Other products, logos, and company names mentioned herein, may be trademarks of their respective owners. 




STPM01 - Programmable single-phase metering IC 

The new standard for effective energy measurement in power line 
systems using Rogowski coil, current transformer, or shunt sensor. 



Innovative products for multi-segment application systems 



Power Supply & 
Battery Charger 




Display 
Control 



ST complements its vast range of standard devices with world-beating 
innovative segment specific products like the STPM01. Designed for 
effective energy measurement in power line systems utilizing Rogowski 
coil, current transformer and/or shunt sensor, it can measure active, 
reactive or apparent energy; RMS and instantaneous voltage and 
current consumption or line frequency via an SPI communication bus. 



STPM01 Main Features 

• Active, reactive, apparent energies and 
RMS values 

• Shunt, current transformer, Rogowski 
coil sensors 

• Ripple free active energy pulsed output 

• Live and neutral monitoring for tamper 
detection 

• Easy and fast digital calibration in only 
one point over the whole current range 

• OTP for calibration and configuration 

• Integrated linear VREGS for digital and 
analog supply 

• Selectable RC or crystal oscillator 

• Support 50-^60Hz, IEC 62052-11 and 
IEC 62053-2x specifications 

• Less than 0.1% error 

• Precision voltage reference: 1.23V and 
30 ppm/°C max 




STPMOl for programmatote^-^^^ 




Solutions @ 



For further information, datasheets and application 
notes visit WWW.St.COm/stpmOl 



DEVICE AVAILABLE FROM THESE DISTRIBUTORS: ARROW • AVNET • DIGI-KEY • FUTURE • MOUSER • NU-HORIZONS